From e9fabd94ab9aaa5853c0c3d659e62b1a1f2cc27b Mon Sep 17 00:00:00 2001 From: Devang Patel Date: Sat, 23 Feb 2008 01:44:55 +0000 Subject: [PATCH] Properly read and write bitcodes for multiple return values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47521 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Bitcode/Reader/BitcodeReader.cpp | 35 +++++++++++++------ lib/Bitcode/Writer/BitcodeWriter.cpp | 22 ++++++++---- .../2008-02-20-MultipleReturnValue.ll | 2 +- 3 files changed, 40 insertions(+), 19 deletions(-) diff --git a/lib/Bitcode/Reader/BitcodeReader.cpp b/lib/Bitcode/Reader/BitcodeReader.cpp index ebfca09c491..a82892063b7 100644 --- a/lib/Bitcode/Reader/BitcodeReader.cpp +++ b/lib/Bitcode/Reader/BitcodeReader.cpp @@ -1337,17 +1337,30 @@ bool BitcodeReader::ParseFunctionBody(Function *F) { } case bitc::FUNC_CODE_INST_RET: // RET: [opty,opval] - if (Record.empty()) { - I = new ReturnInst(); - break; - } else { - unsigned OpNum = 0; - Value *Op; - if (getValueTypePair(Record, OpNum, NextValueNo, Op) || - OpNum != Record.size()) - return Error("Invalid RET record"); - I = new ReturnInst(Op); - break; + { + unsigned Size = Record.size(); + if (Size == 0) { + I = new ReturnInst(); + break; + } else if (Size == 1) { + unsigned OpNum = 0; + Value *Op; + if (getValueTypePair(Record, OpNum, NextValueNo, Op) || + OpNum != Record.size()) + return Error("Invalid RET record"); + I = new ReturnInst(Op); + break; + } else { + std::vector Vs; + Value *Op; + unsigned OpNum = 0; + for (unsigned i = 0; i < Size; ++i) { + getValueTypePair(Record, OpNum, NextValueNo, Op); + Vs.push_back(Op); + } + I = new ReturnInst(Vs); + break; + } } case bitc::FUNC_CODE_INST_BR: { // BR: [bb#, bb#, opval] or [bb#] if (Record.size() != 1 && Record.size() != 3) diff --git a/lib/Bitcode/Writer/BitcodeWriter.cpp b/lib/Bitcode/Writer/BitcodeWriter.cpp index 9b2b93cfcea..5de38b82156 100644 --- a/lib/Bitcode/Writer/BitcodeWriter.cpp +++ b/lib/Bitcode/Writer/BitcodeWriter.cpp @@ -747,15 +747,23 @@ static void WriteInstruction(const Instruction &I, unsigned InstID, case Instruction::GetResult: Code = bitc::FUNC_CODE_INST_GETRESULT; PushValueAndType(I.getOperand(0), InstID, Vals, VE); - Vals.push_back(Log2_32(cast(I).getIndex())+1); + Vals.push_back(cast(I).getIndex()); break; - case Instruction::Ret: - Code = bitc::FUNC_CODE_INST_RET; - if (!I.getNumOperands()) - AbbrevToUse = FUNCTION_INST_RET_VOID_ABBREV; - else if (!PushValueAndType(I.getOperand(0), InstID, Vals, VE)) - AbbrevToUse = FUNCTION_INST_RET_VAL_ABBREV; + case Instruction::Ret: + { + Code = bitc::FUNC_CODE_INST_RET; + unsigned NumOperands = I.getNumOperands(); + if (NumOperands == 0) + AbbrevToUse = FUNCTION_INST_RET_VOID_ABBREV; + else if (NumOperands == 1) { + if (!PushValueAndType(I.getOperand(0), InstID, Vals, VE)) + AbbrevToUse = FUNCTION_INST_RET_VAL_ABBREV; + } else { + for (unsigned i = 0, e = NumOperands; i != e; ++i) + PushValueAndType(I.getOperand(i), InstID, Vals, VE); + } + } break; case Instruction::Br: Code = bitc::FUNC_CODE_INST_BR; diff --git a/test/Assembler/2008-02-20-MultipleReturnValue.ll b/test/Assembler/2008-02-20-MultipleReturnValue.ll index f84ceef293b..5b2ed7e8f48 100644 --- a/test/Assembler/2008-02-20-MultipleReturnValue.ll +++ b/test/Assembler/2008-02-20-MultipleReturnValue.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s -disable-output +; RUN: llvm-as < %s | opt -verify | llvm-dis | llvm-as -disable-output define {i32, i8} @foo(i32 %p) { ret i32 1, i8 2 -- 2.34.1