From d8d36e61fd88fa91132c0c1906805aba99ccd625 Mon Sep 17 00:00:00 2001 From: Daniel Dunbar Date: Fri, 27 Aug 2010 01:30:14 +0000 Subject: [PATCH] X86: Fix an encoding issue with LOCK_ADD64mr, which could lead to very hard to find miscompiles with the integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112250 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86Instr64bit.td | 2 +- test/CodeGen/X86/lock-inst-encoding.ll | 22 ++++++++++++++++++++++ 2 files changed, 23 insertions(+), 1 deletion(-) create mode 100644 test/CodeGen/X86/lock-inst-encoding.ll diff --git a/lib/Target/X86/X86Instr64bit.td b/lib/Target/X86/X86Instr64bit.td index c731ecd8874..1f11dc1d18b 100644 --- a/lib/Target/X86/X86Instr64bit.td +++ b/lib/Target/X86/X86Instr64bit.td @@ -1678,7 +1678,7 @@ def XCHG64ar : RI<0x90, AddRegFrm, (outs), (ins GR64:$src), // Optimized codegen when the non-memory output is not used. let Defs = [EFLAGS], mayLoad = 1, mayStore = 1 in { // FIXME: Use normal add / sub instructions and add lock prefix dynamically. -def LOCK_ADD64mr : RI<0x03, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), +def LOCK_ADD64mr : RI<0x01, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2), "lock\n\t" "add{q}\t{$src2, $dst|$dst, $src2}", []>, LOCK; def LOCK_ADD64mi8 : RIi8<0x83, MRM0m, (outs), diff --git a/test/CodeGen/X86/lock-inst-encoding.ll b/test/CodeGen/X86/lock-inst-encoding.ll new file mode 100644 index 00000000000..03468e2b3f4 --- /dev/null +++ b/test/CodeGen/X86/lock-inst-encoding.ll @@ -0,0 +1,22 @@ +; RUN: llc -O0 --show-mc-encoding < %s | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +; CHECK: f0: +; CHECK: addq %rax, (%rdi) +; CHECK: # encoding: [0xf0,0x48,0x01,0x07] +; CHECK: ret +define void @f0(i64* %a0) { + %t0 = and i64 1, 1 + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) nounwind + %1 = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %a0, i64 %t0) nounwind + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) nounwind + ret void +} + +declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind + +declare i32 @llvm.atomic.load.and.i32.p0i32(i32* nocapture, i32) nounwind + +declare i64 @llvm.atomic.load.add.i64.p0i64(i64* nocapture, i64) nounwind -- 2.34.1