From d5d61edfc66887b3b1962251da877b284b1478ab Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Tue, 14 Feb 2012 23:53:23 +0000 Subject: [PATCH] Fix global live range splitting regmask accuracy. Pretend that regmask interference ends at the 'dead' slot, even when there is other interference ending at the 'reg' slot of the same instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150531 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/InterferenceCache.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/CodeGen/InterferenceCache.cpp b/lib/CodeGen/InterferenceCache.cpp index a8a32f3f1a7..9eb8a758436 100644 --- a/lib/CodeGen/InterferenceCache.cpp +++ b/lib/CodeGen/InterferenceCache.cpp @@ -185,7 +185,8 @@ void InterferenceCache::Entry::update(unsigned MBBNum) { // Also check for register mask interference. SlotIndex Limit = BI->Last.isValid() ? BI->Last : Start; - for (unsigned i = RegMaskSlots.size(); i && RegMaskSlots[i-1] > Limit; --i) + for (unsigned i = RegMaskSlots.size(); + i && RegMaskSlots[i-1].getDeadSlot() > Limit; --i) if (MachineOperand::clobbersPhysReg(RegMaskBits[i-1], PhysReg)) { // Register mask i-1 clobbers PhysReg after the LIU interference. // Model the regmask clobber as a dead def. -- 2.34.1