From ce3e769c15be90463abf14bb71b5a8e1205d3661 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Wed, 6 Jan 2010 23:45:18 +0000 Subject: [PATCH] Addressing mode 6 (load/store) instructions can't encode an immediate offset for stack references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92871 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMBaseRegisterInfo.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 7aebdf484f5..90a61778237 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -523,7 +523,7 @@ static unsigned estimateStackSize(MachineFunction &MF, MachineFrameInfo *MFI) { /// estimateRSStackSizeLimit - Look at each instruction that references stack /// frames and return the stack size limit beyond which some of these -/// instructions will require scratch register during their expansion later. +/// instructions will require a scratch register during their expansion later. unsigned ARMBaseRegisterInfo::estimateRSStackSizeLimit(MachineFunction &MF) const { unsigned Limit = (1 << 12) - 1; @@ -547,6 +547,9 @@ ARMBaseRegisterInfo::estimateRSStackSizeLimit(MachineFunction &MF) const { // When the stack offset is negative, we will end up using // the i8 instructions instead. return (1 << 8) - 1; + + if (AddrMode == ARMII::AddrMode6) + return 0; break; // At most one FI per instruction } } -- 2.34.1