From cdef20c37c0d34afe7101a5163db8d9d9790cb44 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 13 Jan 2016 07:20:07 +0000 Subject: [PATCH] [TableGen] Fix up some stale comments in the AsmMatcher. NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257580 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/AsmWriterEmitter.cpp | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp index 40dea9db41d..10864246abd 100644 --- a/utils/TableGen/AsmWriterEmitter.cpp +++ b/utils/TableGen/AsmWriterEmitter.cpp @@ -291,8 +291,6 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) { /// OpcodeInfo - This encodes the index of the string to use for the first /// chunk of the output as well as indices used for operand printing. - /// To reduce the number of unhandled cases, we expand the size from 32-bit - /// to 32+16 = 48-bit. std::vector OpcodeInfo; // Add all strings to the string table upfront so it can generate an optimized @@ -495,9 +493,9 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) { std::reverse(Instructions.begin(), Instructions.end()); - // Now that we've emitted all of the operand info that fit into 32 bits, emit + // Now that we've emitted all of the operand info that fit into 64 bits, emit // information for those instructions that are left. This is a less dense - // encoding, but we expect the main 32-bit table to handle the majority of + // encoding, but we expect the main 64-bit table to handle the majority of // instructions. if (!Instructions.empty()) { // Find the opcode # of inline asm. -- 2.34.1