From c9fe7508a5e072479d4ab5711c60aa5142c64f10 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 9 Sep 2005 21:59:44 +0000 Subject: [PATCH] I forgot that we always spill fp values as 64-bits. Implement spill folding for FP as well. This triggers a couple dozen times on 177.mesa (for example). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23299 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCRegisterInfo.cpp | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 1ccc8599015..6d564b9ba41 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -149,14 +149,21 @@ MachineInstr *PPC32RegisterInfo::foldMemoryOperand(MachineInstr *MI, unsigned InReg = MI->getOperand(1).getReg(); return addFrameReference(BuildMI(PPC::STW, 3).addReg(InReg), FrameIndex); - } else { + } else { // move -> load unsigned OutReg = MI->getOperand(0).getReg(); return addFrameReference(BuildMI(PPC::LWZ, 2, OutReg), FrameIndex); } } else if (Opc == PPC::FMR) { - // FIXME: We would be able to fold this, but we don't know whether to use a - // 32- or 64-bit load/store :(. + // We currently always spill FP values as doubles. :( + if (OpNum == 0) { // move -> store + unsigned InReg = MI->getOperand(1).getReg(); + return addFrameReference(BuildMI(PPC::STFD, + 3).addReg(InReg), FrameIndex); + } else { // move -> load + unsigned OutReg = MI->getOperand(0).getReg(); + return addFrameReference(BuildMI(PPC::LFD, 2, OutReg), FrameIndex); + } } return 0; } -- 2.34.1