From c3ec7e2273a26d8ae3b8d98160e13f8f44299ad2 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 15 Nov 2013 22:02:28 +0000 Subject: [PATCH] Make method static git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194858 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/SIInstrInfo.cpp | 2 +- lib/Target/R600/SIInstrInfo.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/R600/SIInstrInfo.cpp index b5203a8c4fe..11710b42e60 100644 --- a/lib/Target/R600/SIInstrInfo.cpp +++ b/lib/Target/R600/SIInstrInfo.cpp @@ -367,7 +367,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI, return true; } -unsigned SIInstrInfo::getVALUOp(const MachineInstr &MI) const { +unsigned SIInstrInfo::getVALUOp(const MachineInstr &MI) { switch (MI.getOpcode()) { default: return AMDGPU::INSTRUCTION_LIST_END; case AMDGPU::REG_SEQUENCE: return AMDGPU::REG_SEQUENCE; diff --git a/lib/Target/R600/SIInstrInfo.h b/lib/Target/R600/SIInstrInfo.h index 84ebc963c30..4af63481e3a 100644 --- a/lib/Target/R600/SIInstrInfo.h +++ b/lib/Target/R600/SIInstrInfo.h @@ -68,7 +68,7 @@ public: StringRef &ErrInfo) const; bool isSALUInstr(const MachineInstr &MI) const; - unsigned getVALUOp(const MachineInstr &MI) const; + static unsigned getVALUOp(const MachineInstr &MI); bool isSALUOpSupportedOnVALU(const MachineInstr &MI) const; /// \brief Return the correct register class for \p OpNo. For target-specific -- 2.34.1