From bff35d11f159adb1a2b817e3c546612c633e0eec Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Thu, 26 Apr 2007 21:06:48 +0000 Subject: [PATCH] Have MMX registers clobbered in x86-64 too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36494 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrX86-64.td | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/Target/X86/X86InstrX86-64.td b/lib/Target/X86/X86InstrX86-64.td index 61c6c6aafe5..530d059ff12 100644 --- a/lib/Target/X86/X86InstrX86-64.td +++ b/lib/Target/X86/X86InstrX86-64.td @@ -115,6 +115,7 @@ let isCall = 1, noResults = 1 in // All calls clobber the non-callee saved registers... let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, + MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15] in { def CALL64pcrel32 : I<0xE8, RawFrm, (ops i64imm:$dst, variable_ops), -- 2.34.1