From befc374904cc15968e43631d48fa19c9902b80cf Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 22 Nov 2004 21:25:10 +0000 Subject: [PATCH] Implement a disgusting hack to work around broken machine code emission of the RDCCR instruction. This fixes a bunch of programs with the JIT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18124 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/SparcV9/SparcV9CodeEmitter.cpp | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp index 7759874ce9b..89e0a5db862 100644 --- a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp +++ b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp @@ -292,7 +292,18 @@ void SparcV9CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { currBB = MBB.getBasicBlock(); BBLocations[currBB] = MCE.getCurrentPCValue(); for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I) - emitWord(getBinaryCodeForInstr(*I)); + if (I->getOpcode() != V9::RDCCR) { + emitWord(getBinaryCodeForInstr(*I)); + } else { + // FIXME: The tblgen produced code emitter cannot deal with the fact that + // machine operand #0 of the RDCCR instruction should be ignored. This is + // really a bug in the representation of the RDCCR instruction (which has + // no need to explicitly represent the CCR dest), but we hack around it + // here. + unsigned RegNo = getMachineOpValue(*I, I->getOperand(1)); + RegNo &= (1<<5)-1; + emitWord((RegNo << 25) | 2168487936U); + } } -- 2.34.1