From b9a4cacc91c1a9b5b341dc937db441eba1e43166 Mon Sep 17 00:00:00 2001
From: Eli Friedman <eli.friedman@gmail.com>
Date: Sat, 6 Jun 2009 20:08:03 +0000
Subject: [PATCH] PR4340: Run SimplifyDemandedVectorElts on insertelement
 instructions; sometimes it can find simplifications that won't be found
 otherwise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73006 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Transforms/Scalar/InstructionCombining.cpp     |  6 ++++++
 test/Transforms/InstCombine/vec_demanded_elts-3.ll | 14 ++++++++++++++
 2 files changed, 20 insertions(+)
 create mode 100644 test/Transforms/InstCombine/vec_demanded_elts-3.ll

diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 97bd34c771c..6d2ff0e3e53 100644
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -12579,6 +12579,12 @@ Instruction *InstCombiner::visitInsertElementInst(InsertElementInst &IE) {
     }
   }
 
+  unsigned VWidth = cast<VectorType>(VecOp->getType())->getNumElements();
+  APInt UndefElts(VWidth, 0);
+  APInt AllOnesEltMask(APInt::getAllOnesValue(VWidth));
+  if (SimplifyDemandedVectorElts(&IE, AllOnesEltMask, UndefElts))
+    return &IE;
+
   return 0;
 }
 
diff --git a/test/Transforms/InstCombine/vec_demanded_elts-3.ll b/test/Transforms/InstCombine/vec_demanded_elts-3.ll
new file mode 100644
index 00000000000..eba3629eb9e
--- /dev/null
+++ b/test/Transforms/InstCombine/vec_demanded_elts-3.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep load
+; PR4340
+
+define void @vac(<4 x float>* nocapture %a) nounwind {
+entry:
+	%tmp1 = load <4 x float>* %a		; <<4 x float>> [#uses=1]
+	%vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0	; <<4 x float>> [#uses=1]
+	%vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1]
+	%vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1]
+	%vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1]
+	store <4 x float> %vecins8, <4 x float>* %a
+	ret void
+}
+
-- 
2.34.1