From b70ebd2aa3b6f4546d4734e7bcdbed2017036b4d Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Tue, 23 Nov 2010 18:52:42 +0000 Subject: [PATCH] InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive. This allows to transform the rem in "1 << ((int)x % 8);" to an and. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120028 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/README.txt | 12 ++---------- lib/Transforms/InstCombine/InstCombineShifts.cpp | 15 +++++++++++++++ test/Transforms/InstCombine/shift.ll | 11 +++++++++++ 3 files changed, 28 insertions(+), 10 deletions(-) diff --git a/lib/Target/README.txt b/lib/Target/README.txt index 4d5b17ab367..b98531ca859 100644 --- a/lib/Target/README.txt +++ b/lib/Target/README.txt @@ -1698,22 +1698,14 @@ from gcc. //===---------------------------------------------------------------------===// Missed instcombine transformation: -define i32 @a(i32 %x) nounwind readnone { -entry: - %rem = srem i32 %x, 32 - %shl = shl i32 1, %rem - ret i32 %shl -} - -The srem can be transformed to an and because if x is negative, the shift is -undefined. Here's a more general case that occurs on 64-bit targets: %382 = srem i32 %tmp14.i, 64 ; [#uses=1] %383 = zext i32 %382 to i64 ; [#uses=1] %384 = shl i64 %381, %383 ; [#uses=1] %385 = icmp slt i32 %tmp14.i, 64 ; [#uses=1] -Testcase derived from 403.gcc. +The srem can be transformed to an and because if x is negative, the shift is +undefined. Testcase derived from 403.gcc. //===---------------------------------------------------------------------===// diff --git a/lib/Transforms/InstCombine/InstCombineShifts.cpp b/lib/Transforms/InstCombine/InstCombineShifts.cpp index 9f7d98ed794..7969dbfec04 100644 --- a/lib/Transforms/InstCombine/InstCombineShifts.cpp +++ b/lib/Transforms/InstCombine/InstCombineShifts.cpp @@ -53,6 +53,21 @@ Instruction *InstCombiner::commonShiftTransforms(BinaryOperator &I) { if (ConstantInt *CUI = dyn_cast(Op1)) if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) return Res; + + // X shift (A srem B) -> X shift (A urem B) iff B is positive. + // Because shifts by negative values are undefined. + if (BinaryOperator *BO = dyn_cast(Op1)) + if (BO->getOpcode() == Instruction::SRem && BO->getType()->isIntegerTy()) { + // Make sure the divisor's sign bit is zero. + APInt Mask = APInt::getSignBit(BO->getType()->getPrimitiveSizeInBits()); + if (MaskedValueIsZero(BO->getOperand(1), Mask)) { + Value *URem = Builder->CreateURem(BO->getOperand(0), BO->getOperand(1), + BO->getName()); + I.setOperand(1, URem); + return &I; + } + } + return 0; } diff --git a/test/Transforms/InstCombine/shift.ll b/test/Transforms/InstCombine/shift.ll index 871e9fe070e..6bebca9cc85 100644 --- a/test/Transforms/InstCombine/shift.ll +++ b/test/Transforms/InstCombine/shift.ll @@ -441,3 +441,14 @@ entry: ; CHECK: %ins = or i128 %tmp23, %A ; CHECK: %tmp46 = trunc i128 %ins to i64 } + +define i32 @test38(i32 %x) nounwind readnone { +entry: + %rem = srem i32 %x, 32 + %shl = shl i32 1, %rem + ret i32 %shl +; CHECK: @test38 +; CHECK-NOT: srem +; CHECK: ret i32 +} + -- 2.34.1