From afe5043b39dc74ff461ac731c3da692743bf3335 Mon Sep 17 00:00:00 2001
From: xxm <xxm@rock-chips.com>
Date: Sun, 4 May 2014 15:27:33 +0800
Subject: [PATCH] 
 Documentation:Documentation/devicetree/bindings/iommu/rockchip,rk32-iommu.txt

---
 .../bindings/iommu/rockchip,rk32-iommu.txt       | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iommu/rockchip,rk32-iommu.txt

diff --git a/Documentation/devicetree/bindings/iommu/rockchip,rk32-iommu.txt b/Documentation/devicetree/bindings/iommu/rockchip,rk32-iommu.txt
new file mode 100644
index 000000000000..1b49e4d0f784
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/rockchip,rk32-iommu.txt
@@ -0,0 +1,16 @@
+ROCKCHIP rk32 IOMMU H/W
+
+Required properties:
+- compatible : "iommu,iep_mmu"
+- reg : Should contain address and length for each
+  of the IOMMU register blocks.
+- interrupts : Should contain irq type,irq no,and level type 
+
+Example:
+	iep_mmu {
+		dbgname = "iep";
+		compatible = "iommu,iep_mmu";
+		reg = <0xff900800 0x100>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "iep_mmu";
+	};
-- 
2.34.1