From ac9385a5557ee2f34a509d39c58a8557a0ff686d Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Fri, 12 Oct 2007 00:01:22 +0000 Subject: [PATCH] Add intrinsics for sin, cos, and pow. These use llvm_anyfloat_ty, and so may be overloaded with vector types. And add a testcase for codegen for these. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42885 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Intrinsics.td | 4 +++ lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 16 +++++++++++ test/CodeGen/X86/vector-intrinsics.ll | 27 +++++++++++++++++++ 3 files changed, 47 insertions(+) create mode 100644 test/CodeGen/X86/vector-intrinsics.ll diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td index 6b6b0f51d13..d205d98eb99 100644 --- a/include/llvm/Intrinsics.td +++ b/include/llvm/Intrinsics.td @@ -184,6 +184,10 @@ let Properties = [IntrWriteArgMem] in { let Properties = [IntrNoMem] in { def int_sqrt : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>; def int_powi : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>, llvm_i32_ty]>; + def int_sin : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>; + def int_cos : Intrinsic<[llvm_anyfloat_ty, LLVMMatchType<0>]>; + def int_pow : Intrinsic<[llvm_anyfloat_ty, + LLVMMatchType<0>, LLVMMatchType<0>]>; } // NOTE: these are internal interfaces. diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index b1bf475c473..d636e8b98f4 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -2807,6 +2807,22 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { getValue(I.getOperand(1)), getValue(I.getOperand(2)))); return 0; + case Intrinsic::sin: + setValue(&I, DAG.getNode(ISD::FSIN, + getValue(I.getOperand(1)).getValueType(), + getValue(I.getOperand(1)))); + return 0; + case Intrinsic::cos: + setValue(&I, DAG.getNode(ISD::FCOS, + getValue(I.getOperand(1)).getValueType(), + getValue(I.getOperand(1)))); + return 0; + case Intrinsic::pow: + setValue(&I, DAG.getNode(ISD::FPOW, + getValue(I.getOperand(1)).getValueType(), + getValue(I.getOperand(1)), + getValue(I.getOperand(2)))); + return 0; case Intrinsic::pcmarker: { SDOperand Tmp = getValue(I.getOperand(1)); DAG.setRoot(DAG.getNode(ISD::PCMARKER, MVT::Other, getRoot(), Tmp)); diff --git a/test/CodeGen/X86/vector-intrinsics.ll b/test/CodeGen/X86/vector-intrinsics.ll new file mode 100644 index 00000000000..32916589879 --- /dev/null +++ b/test/CodeGen/X86/vector-intrinsics.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -march=x86-64 | grep call | count 16 + +declare <4 x double> @llvm.sin.v4f64(<4 x double> %p) +declare <4 x double> @llvm.cos.v4f64(<4 x double> %p) +declare <4 x double> @llvm.pow.v4f64(<4 x double> %p, <4 x double> %q) +declare <4 x double> @llvm.powi.v4f64(<4 x double> %p, i32) + +define <4 x double> @foo(<4 x double> %p) +{ + %t = call <4 x double> @llvm.sin.v4f64(<4 x double> %p) + ret <4 x double> %t +} +define <4 x double> @goo(<4 x double> %p) +{ + %t = call <4 x double> @llvm.cos.v4f64(<4 x double> %p) + ret <4 x double> %t +} +define <4 x double> @moo(<4 x double> %p, <4 x double> %q) +{ + %t = call <4 x double> @llvm.pow.v4f64(<4 x double> %p, <4 x double> %q) + ret <4 x double> %t +} +define <4 x double> @zoo(<4 x double> %p, i32 %q) +{ + %t = call <4 x double> @llvm.powi.v4f64(<4 x double> %p, i32 %q) + ret <4 x double> %t +} -- 2.34.1