From a4f3264d02df1acd59d5a8a5022c50df0e39de52 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 9 Sep 2015 08:39:49 +0000 Subject: [PATCH] AMDGPU: Fix not encoding src2 of VOP3b instructions Broken by r247074. Should include an assembler test, but the assembler is currently broken for VOP3b apparently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247123 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/SIInstrInfo.td | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/Target/AMDGPU/SIInstrInfo.td b/lib/Target/AMDGPU/SIInstrInfo.td index 8664c050e26..84321f7c788 100644 --- a/lib/Target/AMDGPU/SIInstrInfo.td +++ b/lib/Target/AMDGPU/SIInstrInfo.td @@ -1448,15 +1448,15 @@ multiclass VOP3SI_2_m pattern, string opName, string revOp, - bit HasMods = 1, bit useSGPRInput = 0, + bit HasMods = 1, bit useSrc2Input = 0, bit UseFullOp = 0> { def "" : VOP3_Pseudo ; def _si : VOP3b_Real_si , - VOP3DisableFields<1, useSGPRInput, HasMods>; + VOP3DisableFields<1, useSrc2Input, HasMods>; def _vi : VOP3b_Real_vi , - VOP3DisableFields<1, useSGPRInput, HasMods>; + VOP3DisableFields<1, useSrc2Input, HasMods>; } multiclass VOP3_C_m ; multiclass VOP3b_64 pattern> : -- 2.34.1