From a3251db21a474affaca945e3fc53f22d30d20f00 Mon Sep 17 00:00:00 2001 From: David Goodwin Date: Mon, 31 Aug 2009 20:47:02 +0000 Subject: [PATCH] Don't mark a register live at an undef use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80621 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/PostRASchedulerList.cpp | 21 +++++++---------- test/CodeGen/ARM/2009-08-21-PostRAKill4.ll | 26 ++++++++++++++++++++++ 2 files changed, 34 insertions(+), 13 deletions(-) create mode 100644 test/CodeGen/ARM/2009-08-21-PostRAKill4.ll diff --git a/lib/CodeGen/PostRASchedulerList.cpp b/lib/CodeGen/PostRASchedulerList.cpp index 4b4c0768ae9..f6e8a786a8d 100644 --- a/lib/CodeGen/PostRASchedulerList.cpp +++ b/lib/CodeGen/PostRASchedulerList.cpp @@ -310,11 +310,11 @@ void SchedulePostRATDList::StartBlock(MachineBasicBlock *BB) { // prologue/epilogue insertion so there's no way to add additional // saved registers. // - // TODO: If the callee saves and restores these, then we can potentially - // use them between the save and the restore. To do that, we could scan - // the exit blocks to see which of these registers are defined. - // Alternatively, callee-saved registers that aren't saved and restored - // could be marked live-in in every block. + // TODO: there is a new method + // MachineFrameInfo::getPristineRegs(MBB). It gives you a list of + // CSRs that have not been saved when entering the MBB. The + // remaining CSRs have been saved and can be treated like call + // clobbered registers. for (const unsigned *I = TRI->getCalleeSavedRegs(); *I; ++I) { unsigned Reg = *I; Classes[Reg] = reinterpret_cast(-1); @@ -788,7 +788,6 @@ void SchedulePostRATDList::FixupKills(MachineBasicBlock *MBB) { I != E; --Count) { MachineInstr *MI = --I; - DEBUG(MI->dump()); // Update liveness. Registers that are defed but not used in this // instruction are now dead. Mark register and all subregs as they // are completely defined. @@ -801,8 +800,6 @@ void SchedulePostRATDList::FixupKills(MachineBasicBlock *MBB) { // Ignore two-addr defs. if (MI->isRegTiedToUseOperand(i)) continue; - DEBUG(errs() << "*** Handling Defs " << TM.getRegisterInfo()->get(Reg).Name << '\n'); - KillIndices[Reg] = ~0u; // Repeat for all subregs. @@ -822,8 +819,6 @@ void SchedulePostRATDList::FixupKills(MachineBasicBlock *MBB) { unsigned Reg = MO.getReg(); if ((Reg == 0) || ReservedRegs.test(Reg)) continue; - DEBUG(errs() << "*** Handling Uses " << TM.getRegisterInfo()->get(Reg).Name << '\n'); - bool kill = false; if (killedRegs.find(Reg) == killedRegs.end()) { kill = true; @@ -851,14 +846,14 @@ void SchedulePostRATDList::FixupKills(MachineBasicBlock *MBB) { killedRegs.insert(Reg); } - // Mark any used register and subregs as now live... + // Mark any used register (that is not using undef) and subregs as + // now live... for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand &MO = MI->getOperand(i); - if (!MO.isReg() || !MO.isUse()) continue; + if (!MO.isReg() || !MO.isUse() || MO.isUndef()) continue; unsigned Reg = MO.getReg(); if ((Reg == 0) || ReservedRegs.test(Reg)) continue; - DEBUG(errs() << "Killing " << TM.getRegisterInfo()->get(Reg).Name << '\n'); KillIndices[Reg] = Count; for (const unsigned *Subreg = TRI->getSubRegisters(Reg); diff --git a/test/CodeGen/ARM/2009-08-21-PostRAKill4.ll b/test/CodeGen/ARM/2009-08-21-PostRAKill4.ll new file mode 100644 index 00000000000..df7614531a1 --- /dev/null +++ b/test/CodeGen/ARM/2009-08-21-PostRAKill4.ll @@ -0,0 +1,26 @@ +; RUN: llvm-as < %s | llc -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards + +; ModuleID = '' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" +target triple = "armv7-apple-darwin9" + +@.str = external constant [36 x i8], align 1 ; <[36 x i8]*> [#uses=0] +@.str1 = external constant [31 x i8], align 1 ; <[31 x i8]*> [#uses=1] +@.str2 = external constant [4 x i8], align 1 ; <[4 x i8]*> [#uses=1] + +declare arm_apcscc i32 @getUnknown(i32, ...) nounwind + +declare void @llvm.va_start(i8*) nounwind + +declare void @llvm.va_end(i8*) nounwind + +declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind + +define arm_apcscc i32 @main() nounwind { +entry: + %0 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([31 x i8]* @.str1, i32 0, i32 0), i32 1, i32 1, i32 1, i32 1, i32 1, i32 1) nounwind ; [#uses=0] + %1 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([31 x i8]* @.str1, i32 0, i32 0), i32 -128, i32 116, i32 116, i32 -3852, i32 -31232, i32 -1708916736) nounwind ; [#uses=0] + %2 = tail call arm_apcscc i32 (i32, ...)* @getUnknown(i32 undef, i32 116, i32 116, i32 -3852, i32 -31232, i32 30556, i32 -1708916736) nounwind ; [#uses=1] + %3 = tail call arm_apcscc i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @.str2, i32 0, i32 0), i32 %2) nounwind ; [#uses=0] + ret i32 0 +} -- 2.34.1