From 9a439affd74e7d4ad77dc7a28a16319d6e08db19 Mon Sep 17 00:00:00 2001 From: Akira Hatanaka Date: Fri, 9 Sep 2011 21:31:46 +0000 Subject: [PATCH] Mips32 does not reserve even-numbered floating point registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139412 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsRegisterInfo.cpp | 5 ----- 1 file changed, 5 deletions(-) diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp index 94e84d764de..c12b3560ee6 100644 --- a/lib/Target/Mips/MipsRegisterInfo.cpp +++ b/lib/Target/Mips/MipsRegisterInfo.cpp @@ -132,11 +132,6 @@ getReservedRegs(const MachineFunction &MF) const { Reserved.set(Mips::F31); Reserved.set(Mips::D15); - // SRV4 requires that odd register can't be used. - if (!Subtarget.isSingleFloat() && !Subtarget.isMips32()) - for (unsigned FReg=(Mips::F0)+1; FReg < Mips::F30; FReg+=2) - Reserved.set(FReg); - return Reserved; } -- 2.34.1