From 98f213cd60f21437846ce4075c0fe15d7f09a3fd Mon Sep 17 00:00:00 2001 From: Kevin Enderby Date: Fri, 2 Sep 2011 18:03:03 +0000 Subject: [PATCH] Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139014 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/MC/Disassembler/X86/x86-32.txt | 3 +++ utils/TableGen/X86RecognizableInstr.cpp | 7 +++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt index 7e93c63ba6e..38221f8d841 100644 --- a/test/MC/Disassembler/X86/x86-32.txt +++ b/test/MC/Disassembler/X86/x86-32.txt @@ -27,3 +27,6 @@ # CHECK: crc32b %al, %eax 0xf2 0x0f 0x38 0xf0 0xc0 + +# CHECK: crc32w %ax, %eax +0x66 0xf2 0x0f 0x38 0xf1 0xc0 diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp index 1b37aa8fe84..5f8fe6ee4cc 100644 --- a/utils/TableGen/X86RecognizableInstr.cpp +++ b/utils/TableGen/X86RecognizableInstr.cpp @@ -225,7 +225,8 @@ RecognizableInstr::RecognizableInstr(DisassemblerTables &tables, Operands = &insn.Operands.OperandList; - IsSSE = HasOpSizePrefix && (Name.find("16") == Name.npos); + IsSSE = (HasOpSizePrefix && (Name.find("16") == Name.npos)) || + (Name.find("CRC32") != Name.npos); HasFROperands = hasFROperands(); HasVEX_LPrefix = has256BitOperands() || Rec->getValueAsBit("hasVEX_L"); @@ -318,7 +319,9 @@ InstructionContext RecognizableInstr::insnContext() const { else insnContext = IC_64BIT; } else { - if (HasOpSizePrefix) + if (HasOpSizePrefix && Prefix == X86Local::TF) + insnContext = IC_XD; + else if (HasOpSizePrefix) insnContext = IC_OPSIZE; else if (Prefix == X86Local::XD) insnContext = IC_XD; -- 2.34.1