From 97d5e6461a28790fa341d9e3b58f043db549dc6a Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 30 Sep 2005 01:29:42 +0000 Subject: [PATCH] Pass extra regclasses into spilling code git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Alpha/AlphaRegisterInfo.cpp | 6 ++++-- lib/Target/Alpha/AlphaRegisterInfo.h | 6 ++++-- lib/Target/Skeleton/SkeletonRegisterInfo.cpp | 6 ++++-- lib/Target/Skeleton/SkeletonRegisterInfo.h | 8 +++++--- lib/Target/Sparc/SparcRegisterInfo.cpp | 6 ++++-- lib/Target/Sparc/SparcRegisterInfo.h | 6 ++++-- lib/Target/SparcV8/SparcV8RegisterInfo.cpp | 6 ++++-- lib/Target/SparcV8/SparcV8RegisterInfo.h | 6 ++++-- lib/Target/SparcV9/SparcV9RegisterInfo.cpp | 6 ++++-- lib/Target/SparcV9/SparcV9RegisterInfo.h | 6 ++++-- lib/Target/X86/X86RegisterInfo.cpp | 6 ++++-- lib/Target/X86/X86RegisterInfo.h | 6 ++++-- 12 files changed, 49 insertions(+), 25 deletions(-) diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp index b6c93531c99..ac7d3f146f8 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.cpp +++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp @@ -75,7 +75,8 @@ static const TargetRegisterClass *getClass(unsigned SrcReg) { void AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned SrcReg, int FrameIdx) const { + unsigned SrcReg, int FrameIdx, + const TargetRegisterClass *RC) const { //std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to " << FrameIdx << "\n"; //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg); if (EnableAlphaLSMark) @@ -92,7 +93,8 @@ AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, void AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned DestReg, int FrameIdx) const{ + unsigned DestReg, int FrameIdx, + const TargetRegisterClass *RC) const { //std::cerr << "Trying to load " << getPrettyName(DestReg) << " to " << FrameIdx << "\n"; if (EnableAlphaLSMark) BuildMI(MBB, MI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(2) diff --git a/lib/Target/Alpha/AlphaRegisterInfo.h b/lib/Target/Alpha/AlphaRegisterInfo.h index d755432321b..0d8c24a50e7 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.h +++ b/lib/Target/Alpha/AlphaRegisterInfo.h @@ -27,11 +27,13 @@ struct AlphaRegisterInfo : public AlphaGenRegisterInfo { /// Code Generation virtual methods... void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned SrcReg, int FrameIndex) const; + unsigned SrcReg, int FrameIndex, + const TargetRegisterClass *RC) const; void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned DestReg, int FrameIndex) const; + unsigned DestReg, int FrameIndex, + const TargetRegisterClass *RC) const; void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, unsigned SrcReg, diff --git a/lib/Target/Skeleton/SkeletonRegisterInfo.cpp b/lib/Target/Skeleton/SkeletonRegisterInfo.cpp index b77487fd329..3114c8bc963 100644 --- a/lib/Target/Skeleton/SkeletonRegisterInfo.cpp +++ b/lib/Target/Skeleton/SkeletonRegisterInfo.cpp @@ -22,13 +22,15 @@ SkeletonRegisterInfo::SkeletonRegisterInfo() void SkeletonRegisterInfo:: storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned SrcReg, int FrameIdx) const { + unsigned SrcReg, int FrameIdx, + const TargetRegisterClass *RC) const { abort(); } void SkeletonRegisterInfo:: loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned DestReg, int FrameIdx) const { + unsigned DestReg, int FrameIdx, + const TargetRegisterClass *RC) const { abort(); } diff --git a/lib/Target/Skeleton/SkeletonRegisterInfo.h b/lib/Target/Skeleton/SkeletonRegisterInfo.h index b4ce91e2157..58787a21978 100644 --- a/lib/Target/Skeleton/SkeletonRegisterInfo.h +++ b/lib/Target/Skeleton/SkeletonRegisterInfo.h @@ -1,4 +1,4 @@ -//===- SkeletonRegisterInfo.h - Skeleton Register Information Impl -*- C++ -*-==// +//===- SkeletonRegisterInfo.h - Skeleton Register Info Impl ------*- C++ -*-==// // // The LLVM Compiler Infrastructure // @@ -24,11 +24,13 @@ namespace llvm { void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned SrcReg, int FrameIndex) const; + unsigned SrcReg, int FrameIndex, + const TargetRegisterClass *RC) const; void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned DestReg, int FrameIndex) const; + unsigned DestReg, int FrameIndex, + const TargetRegisterClass *RC) const; void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, unsigned SrcReg, diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp index de3fc8052f6..af8605a682c 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -40,7 +40,8 @@ static const TargetRegisterClass *getClass(unsigned SrcReg) { void SparcV8RegisterInfo:: storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, - unsigned SrcReg, int FrameIdx) const { + unsigned SrcReg, int FrameIdx, + const TargetRegisterClass *rc) const { const TargetRegisterClass *RC = getClass(SrcReg); // On the order of operands here: think "[FrameIdx + 0] = SrcReg". @@ -59,7 +60,8 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, void SparcV8RegisterInfo:: loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, - unsigned DestReg, int FrameIdx) const { + unsigned DestReg, int FrameIdx, + const TargetRegisterClass *rc) const { const TargetRegisterClass *RC = getClass(DestReg); if (RC == V8::IntRegsRegisterClass) BuildMI (MBB, I, V8::LD, 2, DestReg).addFrameIndex (FrameIdx).addSImm (0); diff --git a/lib/Target/Sparc/SparcRegisterInfo.h b/lib/Target/Sparc/SparcRegisterInfo.h index 851bd8038a2..09ce548a8be 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.h +++ b/lib/Target/Sparc/SparcRegisterInfo.h @@ -28,11 +28,13 @@ struct SparcV8RegisterInfo : public SparcV8GenRegisterInfo { /// Code Generation virtual methods... void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned SrcReg, int FrameIndex) const; + unsigned SrcReg, int FrameIndex, + const TargetRegisterClass *RC) const; void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned DestReg, int FrameIndex) const; + unsigned DestReg, int FrameIndex, + const TargetRegisterClass *RC) const; void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, unsigned SrcReg, diff --git a/lib/Target/SparcV8/SparcV8RegisterInfo.cpp b/lib/Target/SparcV8/SparcV8RegisterInfo.cpp index de3fc8052f6..af8605a682c 100644 --- a/lib/Target/SparcV8/SparcV8RegisterInfo.cpp +++ b/lib/Target/SparcV8/SparcV8RegisterInfo.cpp @@ -40,7 +40,8 @@ static const TargetRegisterClass *getClass(unsigned SrcReg) { void SparcV8RegisterInfo:: storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, - unsigned SrcReg, int FrameIdx) const { + unsigned SrcReg, int FrameIdx, + const TargetRegisterClass *rc) const { const TargetRegisterClass *RC = getClass(SrcReg); // On the order of operands here: think "[FrameIdx + 0] = SrcReg". @@ -59,7 +60,8 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, void SparcV8RegisterInfo:: loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, - unsigned DestReg, int FrameIdx) const { + unsigned DestReg, int FrameIdx, + const TargetRegisterClass *rc) const { const TargetRegisterClass *RC = getClass(DestReg); if (RC == V8::IntRegsRegisterClass) BuildMI (MBB, I, V8::LD, 2, DestReg).addFrameIndex (FrameIdx).addSImm (0); diff --git a/lib/Target/SparcV8/SparcV8RegisterInfo.h b/lib/Target/SparcV8/SparcV8RegisterInfo.h index 851bd8038a2..09ce548a8be 100644 --- a/lib/Target/SparcV8/SparcV8RegisterInfo.h +++ b/lib/Target/SparcV8/SparcV8RegisterInfo.h @@ -28,11 +28,13 @@ struct SparcV8RegisterInfo : public SparcV8GenRegisterInfo { /// Code Generation virtual methods... void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned SrcReg, int FrameIndex) const; + unsigned SrcReg, int FrameIndex, + const TargetRegisterClass *RC) const; void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - unsigned DestReg, int FrameIndex) const; + unsigned DestReg, int FrameIndex, + const TargetRegisterClass *RC) const; void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, unsigned SrcReg, diff --git a/lib/Target/SparcV9/SparcV9RegisterInfo.cpp b/lib/Target/SparcV9/SparcV9RegisterInfo.cpp index 0e3428a88e8..2bbe7bd4217 100644 --- a/lib/Target/SparcV9/SparcV9RegisterInfo.cpp +++ b/lib/Target/SparcV9/SparcV9RegisterInfo.cpp @@ -278,13 +278,15 @@ SparcV9RegisterInfo::SparcV9RegisterInfo () void SparcV9RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned SrcReg, int FrameIndex) const{ + unsigned SrcReg, int FrameIndex, + const TargetRegisterClass *RC) const { abort (); } void SparcV9RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned DestReg, int FrameIndex) const { + unsigned DestReg, int FrameIndex, + const TargetRegisterClass *RC) const { abort (); } diff --git a/lib/Target/SparcV9/SparcV9RegisterInfo.h b/lib/Target/SparcV9/SparcV9RegisterInfo.h index 07e7910ff4e..ed810236a8c 100644 --- a/lib/Target/SparcV9/SparcV9RegisterInfo.h +++ b/lib/Target/SparcV9/SparcV9RegisterInfo.h @@ -27,10 +27,12 @@ struct SparcV9RegisterInfo : public MRegisterInfo { // The rest of these are stubs... for now. void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned SrcReg, int FrameIndex) const; + unsigned SrcReg, int FrameIndex, + const TargetRegisterClass *RC) const; void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned DestReg, int FrameIndex) const; + unsigned DestReg, int FrameIndex, + const TargetRegisterClass *RC) const; void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SrcReg, diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index 7b8d188b2c3..9fd60fd5185 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -58,7 +58,8 @@ static unsigned getIdx(unsigned SpillSize) { void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned SrcReg, int FrameIdx) const { + unsigned SrcReg, int FrameIdx, + const TargetRegisterClass *RC) const { static const unsigned Opcode[] = { X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FST64m, X86::FSTP80m, X86::MOVAPDmr }; @@ -70,7 +71,8 @@ void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned DestReg, int FrameIdx)const{ + unsigned DestReg, int FrameIdx, + const TargetRegisterClass *RC) const{ static const unsigned Opcode[] = { X86::MOV8rm, X86::MOV16rm, X86::MOV32rm, X86::FLD64m, X86::FLD80m, X86::MOVAPDrm }; diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h index a84be1711b3..c6644e767b5 100644 --- a/lib/Target/X86/X86RegisterInfo.h +++ b/lib/Target/X86/X86RegisterInfo.h @@ -28,11 +28,13 @@ struct X86RegisterInfo : public X86GenRegisterInfo { /// Code Generation virtual methods... void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned SrcReg, int FrameIndex) const; + unsigned SrcReg, int FrameIndex, + const TargetRegisterClass *RC) const; void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned DestReg, int FrameIndex) const; + unsigned DestReg, int FrameIndex, + const TargetRegisterClass *RC) const; void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, -- 2.34.1