From 8a8e0eb8b8f48bfe7c7603cf147f98540a84959c Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Fri, 10 Jul 2015 14:01:59 +0800 Subject: [PATCH] dts: rockchip: add cru regmap refnode for mmc Signed-off-by: Shawn Lin --- arch/arm/boot/dts/rk312x.dtsi | 6 ++++++ arch/arm/boot/dts/rk3288.dtsi | 8 ++++++++ arch/arm64/boot/dts/rk3368.dtsi | 9 +++++++++ 3 files changed, 23 insertions(+) mode change 100644 => 100755 arch/arm/boot/dts/rk3288.dtsi mode change 100644 => 100755 arch/arm64/boot/dts/rk3368.dtsi diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi index 46fb32d7b5c9..f8610a3ebccc 100755 --- a/arch/arm/boot/dts/rk312x.dtsi +++ b/arch/arm/boot/dts/rk312x.dtsi @@ -539,6 +539,8 @@ num-slots = <1>; fifo-depth = <0x100>; bus-width = <8>; + cru_regsbase = <0x124>; + cru_reset_offset = <3>; }; @@ -559,6 +561,8 @@ num-slots = <1>; fifo-depth = <0x100>; bus-width = <4>; + cru_regsbase = <0x124>; + cru_reset_offset = <1>; }; sdio: rksdmmc@10218000 { @@ -577,6 +581,8 @@ num-slots = <1>; fifo-depth = <0x100>; bus-width = <4>; + cru_regsbase = <0x124>; + cru_reset_offset = <2>; }; spi0: spi@20074000 { diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi old mode 100644 new mode 100755 index 71566843b858..bd78759977ba --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -288,6 +288,8 @@ fifo-depth = <0x100>; bus-width = <8>; tune_regsbase = <0x218>; + cru_regsbase = <0x1d8>; + cru_reset_offset = <3>; }; sdmmc: rksdmmc@ff0c0000 { @@ -306,6 +308,8 @@ fifo-depth = <0x100>; bus-width = <4>; tune_regsbase = <0x200>; + cru_regsbase = <0x1d8>; + cru_reset_offset = <0>; }; sdio: rksdmmc@ff0d0000 { @@ -324,6 +328,8 @@ fifo-depth = <0x100>; bus-width = <4>; tune_regsbase = <0x208>; + cru_regsbase = <0x1d8>; + cru_reset_offset = <1>; }; sdio1: rksdmmc@ff0e0000 { @@ -340,6 +346,8 @@ num-slots = <1>; fifo-depth = <0x100>; bus-width = <4>; + cru_regsbase = <0x1d8>; + cru_reset_offset = <2>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rk3368.dtsi b/arch/arm64/boot/dts/rk3368.dtsi old mode 100644 new mode 100755 index e953d16f766a..5698f9af8e30 --- a/arch/arm64/boot/dts/rk3368.dtsi +++ b/arch/arm64/boot/dts/rk3368.dtsi @@ -394,10 +394,13 @@ clocks = <&clk_emmc>, <&clk_gates21 2>, <&clk_gates20 10>; clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc"; rockchip,grf = <&grf>; + rockchip,cru = <&cru>; num-slots = <1>; fifo-depth = <0x100>; bus-width = <8>; tune_regsbase = <0x418>; + cru_regsbase = <0x320>; + cru_reset_offset = <3>; }; sdmmc: rksdmmc@ff0c0000 { @@ -414,10 +417,13 @@ clocks = <&clk_sdmmc0>, <&clk_gates21 0>, <&clk_gates20 10>; clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc"; rockchip,grf = <&grf>; + rockchip,cru = <&cru>; num-slots = <1>; fifo-depth = <0x100>; bus-width = <4>; tune_regsbase = <0x400>; + cru_regsbase = <0x320>; + cru_reset_offset = <0>; }; sdio: rksdmmc@ff0d0000 { @@ -432,10 +438,13 @@ clocks = <&clk_sdio0>, <&clk_gates21 1>, <&clk_gates20 10>; clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc"; rockchip,grf = <&grf>; + rockchip,cru = <&cru>; num-slots = <1>; fifo-depth = <0x100>; bus-width = <4>; tune_regsbase = <0x408>; + cru_regsbase = <0x320>; + cru_reset_offset = <1>; }; spi0: spi@ff110000 { -- 2.34.1