From 85d0f9ca6db818a099133ac04ff99b1e07e92e33 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Sun, 29 Nov 2015 22:32:02 +0000 Subject: [PATCH] [WebAssembly] Minor clang-format and selected clang-tidy cleanups. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254267 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../InstPrinter/WebAssemblyInstPrinter.cpp | 23 ++++++++---- .../MCTargetDesc/WebAssemblyMCTargetDesc.cpp | 4 +-- .../WebAssembly/WebAssemblyAsmPrinter.cpp | 9 ++--- .../WebAssembly/WebAssemblyCFGStackify.cpp | 4 +-- .../WebAssembly/WebAssemblyFrameLowering.cpp | 12 +++---- .../WebAssembly/WebAssemblyISelLowering.cpp | 35 ++++++++++--------- .../WebAssembly/WebAssemblyInstrInfo.cpp | 14 ++++---- lib/Target/WebAssembly/WebAssemblyInstrInfo.h | 3 +- .../WebAssembly/WebAssemblyMCInstLower.cpp | 6 ++-- .../WebAssembly/WebAssemblyRegStackify.cpp | 5 +-- .../WebAssembly/WebAssemblyRegisterInfo.cpp | 9 ++--- .../WebAssembly/WebAssemblyTargetMachine.cpp | 5 ++- .../WebAssemblyTargetTransformInfo.cpp | 3 +- 13 files changed, 68 insertions(+), 64 deletions(-) diff --git a/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp b/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp index d5ffcbb411a..9b94806c953 100644 --- a/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp +++ b/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp @@ -13,9 +13,9 @@ //===----------------------------------------------------------------------===// #include "InstPrinter/WebAssemblyInstPrinter.h" +#include "MCTargetDesc/WebAssemblyMCTargetDesc.h" #include "WebAssembly.h" #include "WebAssemblyMachineFunctionInfo.h" -#include "MCTargetDesc/WebAssemblyMCTargetDesc.h" #include "llvm/MC/MCExpr.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCInstrInfo.h" @@ -45,7 +45,7 @@ void WebAssemblyInstPrinter::printRegName(raw_ostream &OS, void WebAssemblyInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, - const MCSubtargetInfo &STI) { + const MCSubtargetInfo & /*STI*/) { printInstruction(MI, OS); const MCInstrDesc &Desc = MII.get(MI->getOpcode()); @@ -99,11 +99,20 @@ void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, case WebAssembly::RESULT: case WebAssembly::LOCAL: switch (Op.getImm()) { - case MVT::i32: O << "i32"; break; - case MVT::i64: O << "i64"; break; - case MVT::f32: O << "f32"; break; - case MVT::f64: O << "f64"; break; - default: llvm_unreachable("unexpected type"); + case MVT::i32: + O << "i32"; + break; + case MVT::i64: + O << "i64"; + break; + case MVT::f32: + O << "f32"; + break; + case MVT::f64: + O << "f64"; + break; + default: + llvm_unreachable("unexpected type"); } break; default: diff --git a/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp b/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp index fcd4c293f63..ac5717a5583 100644 --- a/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp +++ b/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp @@ -35,7 +35,7 @@ using namespace llvm; #define GET_REGINFO_MC_DESC #include "WebAssemblyGenRegisterInfo.inc" -static MCAsmInfo *createWebAssemblyMCAsmInfo(const MCRegisterInfo &MRI, +static MCAsmInfo *createWebAssemblyMCAsmInfo(const MCRegisterInfo & /*MRI*/, const Triple &TT) { return new WebAssemblyMCAsmInfo(TT); } @@ -47,7 +47,7 @@ static MCInstrInfo *createWebAssemblyMCInstrInfo() { } static MCInstPrinter * -createWebAssemblyMCInstPrinter(const Triple &T, unsigned SyntaxVariant, +createWebAssemblyMCInstPrinter(const Triple & /*T*/, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI) { assert(SyntaxVariant == 0); diff --git a/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp index 0cf87a95d62..cfabc21ea4d 100644 --- a/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp +++ b/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp @@ -145,11 +145,9 @@ void WebAssemblyAsmPrinter::EmitJumpTableInfo() { // Nothing to do; jump tables are incorporated into the instruction stream. } -static void ComputeLegalValueVTs(const Function &F, - const TargetMachine &TM, - Type *Ty, - SmallVectorImpl &ValueVTs) { - const DataLayout& DL(F.getParent()->getDataLayout()); +static void ComputeLegalValueVTs(const Function &F, const TargetMachine &TM, + Type *Ty, SmallVectorImpl &ValueVTs) { + const DataLayout &DL(F.getParent()->getDataLayout()); const WebAssemblyTargetLowering &TLI = *TM.getSubtarget(F).getTargetLowering(); SmallVector VTs; @@ -172,7 +170,6 @@ void WebAssemblyAsmPrinter::EmitFunctionBodyStart() { EmitToStreamer(*OutStreamer, Param); } - SmallVector ResultVTs; const Function &F(*MF->getFunction()); ComputeLegalValueVTs(F, TM, F.getReturnType(), ResultVTs); diff --git a/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp b/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp index 2ec1ea5f65a..72891042216 100644 --- a/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp +++ b/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp @@ -225,7 +225,7 @@ static int GetLoopDepth(const MachineLoop *Loop) { } /// Insert a BLOCK marker for branches to MBB (if needed). -static void PlaceBlockMarkers(MachineBasicBlock &MBB, MachineFunction &MF, +static void PlaceBlockMarkers(MachineBasicBlock &MBB, const WebAssemblyInstrInfo &TII, MachineDominatorTree &MDT, const MachineLoopInfo &MLI) { @@ -307,7 +307,7 @@ static void PlaceMarkers(MachineFunction &MF, const MachineLoopInfo &MLI, } // Place the BLOCK for MBB if MBB is branched to from above. - PlaceBlockMarkers(MBB, MF, TII, MDT, MLI); + PlaceBlockMarkers(MBB, TII, MDT, MLI); } } diff --git a/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp b/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp index 8e02a03ecd2..2b70952e360 100644 --- a/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp +++ b/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp @@ -58,17 +58,17 @@ bool WebAssemblyFrameLowering::hasReservedCallFrame( } void WebAssemblyFrameLowering::eliminateCallFramePseudoInstr( - MachineFunction &MF, MachineBasicBlock &MBB, - MachineBasicBlock::iterator I) const { + MachineFunction & /*MF*/, MachineBasicBlock & /*MBB*/, + MachineBasicBlock::iterator /*I*/) const { llvm_unreachable("TODO: implement eliminateCallFramePseudoInstr"); } -void WebAssemblyFrameLowering::emitPrologue(MachineFunction &MF, - MachineBasicBlock &MBB) const { +void WebAssemblyFrameLowering::emitPrologue(MachineFunction & /*MF*/, + MachineBasicBlock & /*MBB*/) const { llvm_unreachable("TODO: implement emitPrologue"); } -void WebAssemblyFrameLowering::emitEpilogue(MachineFunction &MF, - MachineBasicBlock &MBB) const { +void WebAssemblyFrameLowering::emitEpilogue(MachineFunction & /*MF*/, + MachineBasicBlock & /*MBB*/) const { llvm_unreachable("TODO: implement emitEpilogue"); } diff --git a/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index 8bf25debe6b..8f1a06d4630 100644 --- a/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -130,8 +130,8 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( setOperationAction(Op, T, Expand); // Note supported floating-point library function operators that otherwise // default to expand. - for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, - ISD::FRINT}) + for (auto Op : + {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) setOperationAction(Op, T, Legal); // Support minnan and maxnan, which otherwise default to expand. setOperationAction(ISD::FMINNAN, T, Legal); @@ -140,11 +140,11 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( for (auto T : {MVT::i32, MVT::i64}) { // Expand unavailable integer operations. - for (auto Op : {ISD::BSWAP, ISD::ROTL, ISD::ROTR, - ISD::SMUL_LOHI, ISD::UMUL_LOHI, - ISD::MULHS, ISD::MULHU, ISD::SDIVREM, ISD::UDIVREM, - ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS, - ISD::ADDC, ISD::ADDE, ISD::SUBC, ISD::SUBE}) { + for (auto Op : + {ISD::BSWAP, ISD::ROTL, ISD::ROTR, ISD::SMUL_LOHI, ISD::UMUL_LOHI, + ISD::MULHS, ISD::MULHU, ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, + ISD::SRA_PARTS, ISD::SRL_PARTS, ISD::ADDC, ISD::ADDE, ISD::SUBC, + ISD::SUBE}) { setOperationAction(Op, T, Expand); } } @@ -187,13 +187,13 @@ FastISel *WebAssemblyTargetLowering::createFastISel( } bool WebAssemblyTargetLowering::isOffsetFoldingLegal( - const GlobalAddressSDNode *GA) const { + const GlobalAddressSDNode * /*GA*/) const { // The WebAssembly target doesn't support folding offsets into global // addresses. return false; } -MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout &DL, +MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout & /*DL*/, EVT VT) const { return VT.getSimpleVT(); } @@ -267,8 +267,7 @@ WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI, MachineFunction &MF = DAG.getMachineFunction(); CallingConv::ID CallConv = CLI.CallConv; - if (CallConv != CallingConv::C && - CallConv != CallingConv::Fast && + if (CallConv != CallingConv::C && CallConv != CallingConv::Fast && CallConv != CallingConv::Cold) fail(DL, DAG, "WebAssembly doesn't support language-specific or target-specific " @@ -330,8 +329,9 @@ WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI, } bool WebAssemblyTargetLowering::CanLowerReturn( - CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg, - const SmallVectorImpl &Outs, LLVMContext &Context) const { + CallingConv::ID /*CallConv*/, MachineFunction & /*MF*/, bool /*IsVarArg*/, + const SmallVectorImpl &Outs, + LLVMContext & /*Context*/) const { // WebAssembly can't currently handle returning tuples. return Outs.size() <= 1; } @@ -446,8 +446,9 @@ SDValue WebAssemblyTargetLowering::LowerGlobalAddress(SDValue Op, DAG.getTargetGlobalAddress(GA->getGlobal(), DL, VT)); } -SDValue WebAssemblyTargetLowering::LowerExternalSymbol(SDValue Op, - SelectionDAG &DAG) const { +SDValue +WebAssemblyTargetLowering::LowerExternalSymbol(SDValue Op, + SelectionDAG &DAG) const { SDLoc DL(Op); const auto *ES = cast(Op); EVT VT = Op.getValueType(); @@ -498,8 +499,8 @@ SDValue WebAssemblyTargetLowering::LowerBR_JT(SDValue Op, //===----------------------------------------------------------------------===// MCSection *WebAssemblyTargetObjectFile::SelectSectionForGlobal( - const GlobalValue *GV, SectionKind Kind, Mangler &Mang, - const TargetMachine &TM) const { + const GlobalValue *GV, SectionKind /*Kind*/, Mangler & /*Mang*/, + const TargetMachine & /*TM*/) const { // TODO: Be more sophisticated than this. return isa(GV) ? getTextSection() : getDataSection(); } diff --git a/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp b/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp index 2f1d5eb5287..82296b3cdac 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp +++ b/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp @@ -58,7 +58,7 @@ bool WebAssemblyInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl &Cond, - bool AllowModify) const { + bool /*AllowModify*/) const { bool HaveCond = false; for (MachineInstr &MI : iterator_range( MBB.getFirstInstrTerminator(), MBB.instr_end())) { @@ -106,9 +106,11 @@ unsigned WebAssemblyInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { return Count; } -unsigned WebAssemblyInstrInfo::InsertBranch( - MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, - ArrayRef Cond, DebugLoc DL) const { +unsigned WebAssemblyInstrInfo::InsertBranch(MachineBasicBlock &MBB, + MachineBasicBlock *TBB, + MachineBasicBlock *FBB, + ArrayRef Cond, + DebugLoc DL) const { assert(Cond.size() <= 1); if (Cond.empty()) { @@ -119,9 +121,7 @@ unsigned WebAssemblyInstrInfo::InsertBranch( return 1; } - BuildMI(&MBB, DL, get(WebAssembly::BR_IF)) - .addOperand(Cond[0]) - .addMBB(TBB); + BuildMI(&MBB, DL, get(WebAssembly::BR_IF)).addOperand(Cond[0]).addMBB(TBB); if (!FBB) return 1; diff --git a/lib/Target/WebAssembly/WebAssemblyInstrInfo.h b/lib/Target/WebAssembly/WebAssemblyInstrInfo.h index b36a128b510..5ddd9b36f24 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrInfo.h +++ b/lib/Target/WebAssembly/WebAssemblyInstrInfo.h @@ -44,8 +44,7 @@ public: bool AllowModify = false) const override; unsigned RemoveBranch(MachineBasicBlock &MBB) const override; unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, - MachineBasicBlock *FBB, - ArrayRef Cond, + MachineBasicBlock *FBB, ArrayRef Cond, DebugLoc DL) const override; bool ReverseBranchCondition(SmallVectorImpl &Cond) const override; diff --git a/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp b/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp index 0bfef443245..31dedf1788f 100644 --- a/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp +++ b/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp @@ -17,9 +17,7 @@ #include "WebAssemblyMachineFunctionInfo.h" #include "llvm/ADT/SmallString.h" #include "llvm/CodeGen/AsmPrinter.h" -#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/MachineInstr.h" #include "llvm/IR/Constants.h" #include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCContext.h" @@ -34,8 +32,8 @@ WebAssemblyMCInstLower::GetGlobalAddressSymbol(const MachineOperand &MO) const { return Printer.getSymbol(MO.getGlobal()); } -MCSymbol * -WebAssemblyMCInstLower::GetExternalSymbolSymbol(const MachineOperand &MO) const { +MCSymbol *WebAssemblyMCInstLower::GetExternalSymbolSymbol( + const MachineOperand &MO) const { return Printer.GetExternalSymbolSymbol(MO.getSymbolName()); } diff --git a/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp b/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp index ba2a0e20b2b..c3847dd9fcb 100644 --- a/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp +++ b/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp @@ -21,8 +21,8 @@ //===----------------------------------------------------------------------===// #include "WebAssembly.h" -#include "WebAssemblyMachineFunctionInfo.h" #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" // for WebAssembly::ARGUMENT_* +#include "WebAssemblyMachineFunctionInfo.h" #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/CodeGen/MachineBlockFrequencyInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" @@ -201,7 +201,8 @@ bool WebAssemblyRegStackify::runOnMachineFunction(MachineFunction &MF) { for (MachineBasicBlock &MBB : MF) { for (MachineInstr &MI : MBB) { for (MachineOperand &MO : reverse(MI.explicit_operands())) { - if (!MO.isReg()) continue; + if (!MO.isReg()) + continue; unsigned VReg = MO.getReg(); if (MFI.isVRegStackified(VReg)) { diff --git a/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp b/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp index 0c9ffb3a8e7..6c74098aff1 100644 --- a/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp +++ b/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp @@ -43,7 +43,7 @@ WebAssemblyRegisterInfo::getCalleeSavedRegs(const MachineFunction *) const { } BitVector -WebAssemblyRegisterInfo::getReservedRegs(const MachineFunction &MF) const { +WebAssemblyRegisterInfo::getReservedRegs(const MachineFunction & /*MF*/) const { BitVector Reserved(getNumRegs()); for (auto Reg : {WebAssembly::SP32, WebAssembly::SP64, WebAssembly::FP32, WebAssembly::FP64}) @@ -52,9 +52,10 @@ WebAssemblyRegisterInfo::getReservedRegs(const MachineFunction &MF) const { } void WebAssemblyRegisterInfo::eliminateFrameIndex( - MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS) const { - llvm_unreachable("TODO: implement WebAssemblyRegisterInfo::eliminateFrameIndex"); + MachineBasicBlock::iterator /*II*/, int /*SPAdj*/, + unsigned /*FIOperandNum*/, RegScavenger * /*RS*/) const { + llvm_unreachable( + "TODO: implement WebAssemblyRegisterInfo::eliminateFrameIndex"); } unsigned diff --git a/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp index c98bea9c214..e62a07dbb9d 100644 --- a/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp +++ b/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp @@ -46,9 +46,8 @@ WebAssemblyTargetMachine::WebAssemblyTargetMachine( const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) - : LLVMTargetMachine(T, TT.isArch64Bit() - ? "e-p:64:64-i64:64-n32:64-S128" - : "e-p:32:32-i64:64-n32:64-S128", + : LLVMTargetMachine(T, TT.isArch64Bit() ? "e-p:64:64-i64:64-n32:64-S128" + : "e-p:32:32-i64:64-n32:64-S128", TT, CPU, FS, Options, RM, CM, OL), TLOF(make_unique()) { // WebAssembly type-checks expressions, but a noreturn function with a return diff --git a/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp b/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp index 559932f5fb4..ea7044d5883 100644 --- a/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp +++ b/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp @@ -26,8 +26,7 @@ WebAssemblyTTIImpl::getPopcntSupport(unsigned TyWidth) const { return TargetTransformInfo::PSK_FastHardware; } -bool -WebAssemblyTTIImpl::haveFastSqrt(Type *Ty) const { +bool WebAssemblyTTIImpl::haveFastSqrt(Type *Ty) const { assert(Ty->isFPOrFPVectorTy() && "Ty must be floating point"); return true; } -- 2.34.1