From 7e7c9cc31a9c0ca337235ae04fc268e58da1d01b Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Sun, 12 Jun 2011 22:47:53 +0000 Subject: [PATCH] Simplify code. No functionality changes, name changes aside. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132896 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../InstCombine/InstCombineCompares.cpp | 17 ++++++----------- test/Transforms/InstCombine/cast.ll | 4 ++-- 2 files changed, 8 insertions(+), 13 deletions(-) diff --git a/lib/Transforms/InstCombine/InstCombineCompares.cpp b/lib/Transforms/InstCombine/InstCombineCompares.cpp index c7ed098cbf8..92cbc1b7f18 100644 --- a/lib/Transforms/InstCombine/InstCombineCompares.cpp +++ b/lib/Transforms/InstCombine/InstCombineCompares.cpp @@ -1087,19 +1087,14 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI, // have its sign bit set or if it is an equality comparison. // Extending a relational comparison when we're checking the sign // bit would not work. - if (Cast->hasOneUse() && - (ICI.isEquality() || - (AndCST->getValue().isNonNegative() && RHSV.isNonNegative()))) { - uint32_t BitWidth = - cast(Cast->getOperand(0)->getType())->getBitWidth(); - APInt NewCST = AndCST->getValue().zext(BitWidth); - APInt NewCI = RHSV.zext(BitWidth); - Value *NewAnd = + if (ICI.isEquality() || + (AndCST->getValue().isNonNegative() && RHSV.isNonNegative())) { + Value *NewAnd = Builder->CreateAnd(Cast->getOperand(0), - ConstantInt::get(ICI.getContext(), NewCST), - LHSI->getName()); + ConstantExpr::getZExt(AndCST, Cast->getSrcTy())); + NewAnd->takeName(LHSI); return new ICmpInst(ICI.getPredicate(), NewAnd, - ConstantInt::get(ICI.getContext(), NewCI)); + ConstantExpr::getZExt(RHS, Cast->getSrcTy())); } } diff --git a/test/Transforms/InstCombine/cast.ll b/test/Transforms/InstCombine/cast.ll index bc5e3655c19..333c4109b55 100644 --- a/test/Transforms/InstCombine/cast.ll +++ b/test/Transforms/InstCombine/cast.ll @@ -265,8 +265,8 @@ define i1 @test31(i64 %A) { %C = and i32 %B, 42 ; [#uses=1] %D = icmp eq i32 %C, 10 ; [#uses=1] ret i1 %D -; CHECK: %C1 = and i64 %A, 42 -; CHECK: %D = icmp eq i64 %C1, 10 +; CHECK: %C = and i64 %A, 42 +; CHECK: %D = icmp eq i64 %C, 10 ; CHECK: ret i1 %D } -- 2.34.1