From 7687bd0b2bbff184586f0b4058b93d013a1ce508 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Tue, 2 Oct 2007 21:49:31 +0000 Subject: [PATCH] Another micro-opt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42554 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/README.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/lib/Target/X86/README.txt b/lib/Target/X86/README.txt index 81e9797f05f..0fd79f23611 100644 --- a/lib/Target/X86/README.txt +++ b/lib/Target/X86/README.txt @@ -1306,3 +1306,19 @@ However, ICC caches this information before the loop and produces this: movl 88(%esp), %eax #481.12 //===---------------------------------------------------------------------===// + +This code: + + %tmp659 = icmp slt i16 %tmp654, 0 ; [#uses=1] + br i1 %tmp659, label %cond_true662, label %cond_next715 + +produces this: + + testw %cx, %cx + movswl %cx, %esi + jns LBB4_109 # cond_next715 + +Shark tells us that using %cx in the testw instruction is sub-optimal. It +suggests using the 32-bit register (which is what ICC uses). + +//===---------------------------------------------------------------------===// -- 2.34.1