From 70fcb6bf58268798b9b3ee7983eb9c9e1aed4811 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Sun, 31 Aug 2008 02:32:12 +0000 Subject: [PATCH] CellSPU doesn't appear to support fully the "ISD::ROTR" operation. The DAG combiner can now generate ROTR if the backend says that it can handle it. Cell SPU says this, but gets an error from code gen saying that it can't select ROTR. I'm xfailing this test until this can be fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55579 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/CellSPU/rotate_ops.ll | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/test/CodeGen/CellSPU/rotate_ops.ll b/test/CodeGen/CellSPU/rotate_ops.ll index 55104a4ceb7..9c7ebeb97dd 100644 --- a/test/CodeGen/CellSPU/rotate_ops.ll +++ b/test/CodeGen/CellSPU/rotate_ops.ll @@ -8,6 +8,12 @@ ; RUN grep rothi.*,.3 %t1.s | count 1 ; RUN: grep andhi %t1.s | count 4 ; RUN: grep shlhi %t1.s | count 4 +; XFAIL: * + +;; FIXME: ROTR hasn't been implemented in CellSPU! It's marked as a "legal" +;; operation, but if used, the code generator complains that it can't +;; be selected. + target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" -- 2.34.1