From 5a3eb8f0e1141825634be38165e40871ce60b3d5 Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Thu, 15 Jul 2010 07:49:30 +0000 Subject: [PATCH] 80-col. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108420 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetInstrInfo.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 6e699143205..e42be2676cd 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -371,7 +371,7 @@ public: unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const { - assert(0 && "Target didn't implement TargetInstrInfo::storeRegToStackSlot!"); + assert(0 && "Target didn't implement TargetInstrInfo::storeRegToStackSlot!"); } /// loadRegFromStackSlot - Load the specified register of the given register @@ -383,7 +383,7 @@ public: unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const { - assert(0 && "Target didn't implement TargetInstrInfo::loadRegFromStackSlot!"); + assert(0 && "Target didn't implement TargetInstrInfo::loadRegFromStackSlot!"); } /// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee @@ -392,7 +392,7 @@ public: /// storeRegToStackSlot(). Returns false otherwise. virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + const std::vector &CSI, const TargetRegisterInfo *TRI) const { return false; } @@ -457,7 +457,7 @@ protected: /// take care of adding a MachineMemOperand to the newly created instruction. virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF, MachineInstr* MI, - const SmallVectorImpl &Ops, + const SmallVectorImpl &Ops, MachineInstr* LoadMI) const { return 0; } @@ -501,7 +501,7 @@ public: /// only differences between the two addresses are the offset. It also returns /// the offsets by reference. virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, - int64_t &Offset1, int64_t &Offset2) const { + int64_t &Offset1, int64_t &Offset2) const { return false; } -- 2.34.1