From 54f009f5a427c640266d223826eed851a8a340c3 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Thu, 14 Nov 2013 08:06:38 +0000 Subject: [PATCH] Add a comment git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194684 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/SIInstrInfo.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/R600/SIInstrInfo.cpp index e293c3a22ae..8eb707d7380 100644 --- a/lib/Target/R600/SIInstrInfo.cpp +++ b/lib/Target/R600/SIInstrInfo.cpp @@ -440,7 +440,9 @@ void SIInstrInfo::legalizeOperands(MachineInstr *MI) const { // Legalize VOP2 if (isVOP2(MI->getOpcode()) && Src1Idx != -1) { MachineOperand &Src1 = MI->getOperand(Src1Idx); - // Legalize VOP2 instructions where src1 is not a VGPR. + + // Legalize VOP2 instructions where src1 is not a VGPR. An SGPR input must + // be the first operand, and there can only be one. if (Src1.isImm() || Src1.isFPImm() || (Src1.isReg() && RI.isSGPRClass(MRI.getRegClass(Src1.getReg())))) { if (MI->isCommutable()) { -- 2.34.1