From 52b2774577e07fbf804e4d647119578df4111f21 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Fri, 19 Jul 2013 16:24:22 +0000 Subject: [PATCH] [SystemZ] Add NGRK, OGRK and XGRK Like r186683, but for 64 bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186685 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/SystemZ/SystemZInstrFormats.td | 12 ++++++++ lib/Target/SystemZ/SystemZInstrInfo.td | 6 ++-- test/CodeGen/SystemZ/and-03.ll | 3 +- test/CodeGen/SystemZ/and-07.ll | 18 ++++++++++++ test/CodeGen/SystemZ/atomicrmw-and-04.ll | 2 +- test/CodeGen/SystemZ/atomicrmw-nand-04.ll | 2 +- test/CodeGen/SystemZ/atomicrmw-or-04.ll | 2 +- test/CodeGen/SystemZ/atomicrmw-xor-04.ll | 2 +- test/CodeGen/SystemZ/or-03.ll | 3 +- test/CodeGen/SystemZ/or-07.ll | 18 ++++++++++++ test/CodeGen/SystemZ/xor-03.ll | 3 +- test/CodeGen/SystemZ/xor-07.ll | 18 ++++++++++++ test/MC/Disassembler/SystemZ/insns.txt | 18 ++++++++++++ test/MC/SystemZ/insn-bad.s | 15 ++++++++++ test/MC/SystemZ/insn-good-z196.s | 36 +++++++++++++++++++++++ 15 files changed, 148 insertions(+), 10 deletions(-) diff --git a/lib/Target/SystemZ/SystemZInstrFormats.td b/lib/Target/SystemZ/SystemZInstrFormats.td index 24f86bca09f..f0999756281 100644 --- a/lib/Target/SystemZ/SystemZInstrFormats.td +++ b/lib/Target/SystemZ/SystemZInstrFormats.td @@ -747,6 +747,18 @@ multiclass BinaryRRAndK opcode1, bits<16> opcode2, } } +multiclass BinaryRREAndK opcode1, bits<16> opcode2, + SDPatternOperator operator, RegisterOperand cls1, + RegisterOperand cls2> { + let NumOpsKey = mnemonic in { + let NumOpsValue = "3" in + def K : BinaryRRFK, + Requires<[FeatureDistinctOps]>; + let NumOpsValue = "2", isConvertibleToThreeAddress = 1 in + def "" : BinaryRRE; + } +} + class BinaryRI opcode, SDPatternOperator operator, RegisterOperand cls, Immediate imm> : InstRI; - def NGR : BinaryRRE<"ng", 0xB980, and, GR64, GR64>; + defm NGR : BinaryRREAndK<"ng", 0xB980, 0xB9E4, and, GR64, GR64>; } // ANDs of a 16-bit immediate, leaving other bits unaffected. @@ -686,7 +686,7 @@ let Defs = [CC] in { // ORs of a register. let isCommutable = 1 in { defm OR : BinaryRRAndK<"o", 0x16, 0xB9F6, or, GR32, GR32>; - def OGR : BinaryRRE<"og", 0xB981, or, GR64, GR64>; + defm OGR : BinaryRREAndK<"og", 0xB981, 0xB9E6, or, GR64, GR64>; } // ORs of a 16-bit immediate, leaving other bits unaffected. @@ -723,7 +723,7 @@ let Defs = [CC] in { // XORs of a register. let isCommutable = 1 in { defm XR : BinaryRRAndK<"x", 0x17, 0xB9F7, xor, GR32, GR32>; - def XGR : BinaryRRE<"xg", 0xB982, xor, GR64, GR64>; + defm XGR : BinaryRREAndK<"xg", 0xB982, 0xB9E7, xor, GR64, GR64>; } // XORs of a 32-bit immediate, leaving other bits unaffected. diff --git a/test/CodeGen/SystemZ/and-03.ll b/test/CodeGen/SystemZ/and-03.ll index ca262cfb459..a0560d46e4e 100644 --- a/test/CodeGen/SystemZ/and-03.ll +++ b/test/CodeGen/SystemZ/and-03.ll @@ -1,6 +1,7 @@ ; Test 64-bit ANDs in which the second operand is variable. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s declare i64 @foo() diff --git a/test/CodeGen/SystemZ/and-07.ll b/test/CodeGen/SystemZ/and-07.ll index 2bdf97d4704..ad4c4af59fd 100644 --- a/test/CodeGen/SystemZ/and-07.ll +++ b/test/CodeGen/SystemZ/and-07.ll @@ -19,3 +19,21 @@ define i32 @f2(i32 %a, i32 %b) { %and = and i32 %a, %b ret i32 %and } + +; Check NGRK. +define i64 @f3(i64 %a, i64 %b, i64 %c) { +; CHECK-LABEL: f3: +; CHECK: ngrk %r2, %r3, %r4 +; CHECK: br %r14 + %and = and i64 %b, %c + ret i64 %and +} + +; Check that we can still use NGR in obvious cases. +define i64 @f4(i64 %a, i64 %b) { +; CHECK-LABEL: f4: +; CHECK: ngr %r2, %r3 +; CHECK: br %r14 + %and = and i64 %a, %b + ret i64 %and +} diff --git a/test/CodeGen/SystemZ/atomicrmw-and-04.ll b/test/CodeGen/SystemZ/atomicrmw-and-04.ll index 6a9f81ac39b..b224423c0b3 100644 --- a/test/CodeGen/SystemZ/atomicrmw-and-04.ll +++ b/test/CodeGen/SystemZ/atomicrmw-and-04.ll @@ -1,6 +1,6 @@ ; Test 64-bit atomic ANDs. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s ; Check ANDs of a variable. define i64 @f1(i64 %dummy, i64 *%src, i64 %b) { diff --git a/test/CodeGen/SystemZ/atomicrmw-nand-04.ll b/test/CodeGen/SystemZ/atomicrmw-nand-04.ll index 2fb919d3a34..907647106c8 100644 --- a/test/CodeGen/SystemZ/atomicrmw-nand-04.ll +++ b/test/CodeGen/SystemZ/atomicrmw-nand-04.ll @@ -1,6 +1,6 @@ ; Test 64-bit atomic NANDs. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s ; Check NANDs of a variable. define i64 @f1(i64 %dummy, i64 *%src, i64 %b) { diff --git a/test/CodeGen/SystemZ/atomicrmw-or-04.ll b/test/CodeGen/SystemZ/atomicrmw-or-04.ll index de798be1c13..47827687659 100644 --- a/test/CodeGen/SystemZ/atomicrmw-or-04.ll +++ b/test/CodeGen/SystemZ/atomicrmw-or-04.ll @@ -1,6 +1,6 @@ ; Test 64-bit atomic ORs. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s ; Check ORs of a variable. define i64 @f1(i64 %dummy, i64 *%src, i64 %b) { diff --git a/test/CodeGen/SystemZ/atomicrmw-xor-04.ll b/test/CodeGen/SystemZ/atomicrmw-xor-04.ll index d767b20a574..1e438bd2dc1 100644 --- a/test/CodeGen/SystemZ/atomicrmw-xor-04.ll +++ b/test/CodeGen/SystemZ/atomicrmw-xor-04.ll @@ -1,6 +1,6 @@ ; Test 64-bit atomic XORs. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s ; Check XORs of a variable. define i64 @f1(i64 %dummy, i64 *%src, i64 %b) { diff --git a/test/CodeGen/SystemZ/or-03.ll b/test/CodeGen/SystemZ/or-03.ll index 3e373673686..5fdbdfd1ed1 100644 --- a/test/CodeGen/SystemZ/or-03.ll +++ b/test/CodeGen/SystemZ/or-03.ll @@ -1,6 +1,7 @@ ; Test 64-bit ORs in which the second operand is variable. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s declare i64 @foo() diff --git a/test/CodeGen/SystemZ/or-07.ll b/test/CodeGen/SystemZ/or-07.ll index f6848a16591..9fff88e7165 100644 --- a/test/CodeGen/SystemZ/or-07.ll +++ b/test/CodeGen/SystemZ/or-07.ll @@ -19,3 +19,21 @@ define i32 @f2(i32 %a, i32 %b) { %or = or i32 %a, %b ret i32 %or } + +; Check OGRK. +define i64 @f3(i64 %a, i64 %b, i64 %c) { +; CHECK-LABEL: f3: +; CHECK: ogrk %r2, %r3, %r4 +; CHECK: br %r14 + %or = or i64 %b, %c + ret i64 %or +} + +; Check that we can still use OGR in obvious cases. +define i64 @f4(i64 %a, i64 %b) { +; CHECK-LABEL: f4: +; CHECK: ogr %r2, %r3 +; CHECK: br %r14 + %or = or i64 %a, %b + ret i64 %or +} diff --git a/test/CodeGen/SystemZ/xor-03.ll b/test/CodeGen/SystemZ/xor-03.ll index 2cd428ae7fc..ab7f2584b60 100644 --- a/test/CodeGen/SystemZ/xor-03.ll +++ b/test/CodeGen/SystemZ/xor-03.ll @@ -1,6 +1,7 @@ ; Test 64-bit XORs in which the second operand is variable. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s declare i64 @foo() diff --git a/test/CodeGen/SystemZ/xor-07.ll b/test/CodeGen/SystemZ/xor-07.ll index 22deef64ce9..ec2a0385b16 100644 --- a/test/CodeGen/SystemZ/xor-07.ll +++ b/test/CodeGen/SystemZ/xor-07.ll @@ -19,3 +19,21 @@ define i32 @f2(i32 %a, i32 %b) { %xor = xor i32 %a, %b ret i32 %xor } + +; Check XGRK. +define i64 @f3(i64 %a, i64 %b, i64 %c) { +; CHECK-LABEL: f3: +; CHECK: xgrk %r2, %r3, %r4 +; CHECK: br %r14 + %xor = xor i64 %b, %c + ret i64 %xor +} + +; Check that we can still use XGR in obvious cases. +define i64 @f4(i64 %a, i64 %b) { +; CHECK-LABEL: f4: +; CHECK: xgr %r2, %r3 +; CHECK: br %r14 + %xor = xor i64 %a, %b + ret i64 %xor +} diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt index 68d585ad2ae..4352ae0fbf1 100644 --- a/test/MC/Disassembler/SystemZ/insns.txt +++ b/test/MC/Disassembler/SystemZ/insns.txt @@ -4207,6 +4207,12 @@ # CHECK: ng %r0, -524288 0xe3 0x00 0x00 0x00 0x80 0x80 +# CHECK: ngrk %r0, %r0, %r0 +0xb9 0xe4 0x00 0x00 + +# CHECK: ngrk %r2, %r3, %r4 +0xb9 0xe4 0x40 0x23 + # CHECK: ng %r0, -1 0xe3 0x00 0x0f 0xff 0xff 0x80 @@ -4432,6 +4438,12 @@ # CHECK: ogr %r7, %r8 0xb9 0x81 0x00 0x78 +# CHECK: ogrk %r0, %r0, %r0 +0xb9 0xe6 0x00 0x00 + +# CHECK: ogrk %r2, %r3, %r4 +0xb9 0xe6 0x40 0x23 + # CHECK: og %r0, -524288 0xe3 0x00 0x00 0x00 0x80 0x81 @@ -6091,6 +6103,12 @@ # CHECK: xgr %r7, %r8 0xb9 0x82 0x00 0x78 +# CHECK: xgrk %r0, %r0, %r0 +0xb9 0xe7 0x00 0x00 + +# CHECK: xgrk %r2, %r3, %r4 +0xb9 0xe7 0x40 0x23 + # CHECK: xg %r0, -524288 0xe3 0x00 0x00 0x00 0x80 0x82 diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s index ccc778dee2f..6d1b086ad2d 100644 --- a/test/MC/SystemZ/insn-bad.s +++ b/test/MC/SystemZ/insn-bad.s @@ -1900,6 +1900,11 @@ ng %r0, -524289 ng %r0, 524288 +#CHECK: error: {{(instruction requires: distinct-ops)?}} +#CHECK: ngrk %r2,%r3,%r4 + + ngrk %r2,%r3,%r4 + #CHECK: error: invalid operand #CHECK: ni -1, 0 #CHECK: error: invalid operand @@ -2011,6 +2016,11 @@ og %r0, -524289 og %r0, 524288 +#CHECK: error: {{(instruction requires: distinct-ops)?}} +#CHECK: ogrk %r2,%r3,%r4 + + ogrk %r2,%r3,%r4 + #CHECK: error: invalid operand #CHECK: oi -1, 0 #CHECK: error: invalid operand @@ -2646,6 +2656,11 @@ xg %r0, -524289 xg %r0, 524288 +#CHECK: error: {{(instruction requires: distinct-ops)?}} +#CHECK: xgrk %r2,%r3,%r4 + + xgrk %r2,%r3,%r4 + #CHECK: error: invalid operand #CHECK: xi -1, 0 #CHECK: error: invalid operand diff --git a/test/MC/SystemZ/insn-good-z196.s b/test/MC/SystemZ/insn-good-z196.s index 9d64670cdf2..e00f9049f75 100644 --- a/test/MC/SystemZ/insn-good-z196.s +++ b/test/MC/SystemZ/insn-good-z196.s @@ -1,6 +1,18 @@ # For z196 and above. # RUN: llvm-mc -triple s390x-linux-gnu -mcpu=z196 -show-encoding %s | FileCheck %s +#CHECK: ngrk %r0, %r0, %r0 # encoding: [0xb9,0xe4,0x00,0x00] +#CHECK: ngrk %r0, %r0, %r15 # encoding: [0xb9,0xe4,0xf0,0x00] +#CHECK: ngrk %r0, %r15, %r0 # encoding: [0xb9,0xe4,0x00,0x0f] +#CHECK: ngrk %r15, %r0, %r0 # encoding: [0xb9,0xe4,0x00,0xf0] +#CHECK: ngrk %r7, %r8, %r9 # encoding: [0xb9,0xe4,0x90,0x78] + + ngrk %r0,%r0,%r0 + ngrk %r0,%r0,%r15 + ngrk %r0,%r15,%r0 + ngrk %r15,%r0,%r0 + ngrk %r7,%r8,%r9 + #CHECK: nrk %r0, %r0, %r0 # encoding: [0xb9,0xf4,0x00,0x00] #CHECK: nrk %r0, %r0, %r15 # encoding: [0xb9,0xf4,0xf0,0x00] #CHECK: nrk %r0, %r15, %r0 # encoding: [0xb9,0xf4,0x00,0x0f] @@ -13,6 +25,18 @@ nrk %r15,%r0,%r0 nrk %r7,%r8,%r9 +#CHECK: ogrk %r0, %r0, %r0 # encoding: [0xb9,0xe6,0x00,0x00] +#CHECK: ogrk %r0, %r0, %r15 # encoding: [0xb9,0xe6,0xf0,0x00] +#CHECK: ogrk %r0, %r15, %r0 # encoding: [0xb9,0xe6,0x00,0x0f] +#CHECK: ogrk %r15, %r0, %r0 # encoding: [0xb9,0xe6,0x00,0xf0] +#CHECK: ogrk %r7, %r8, %r9 # encoding: [0xb9,0xe6,0x90,0x78] + + ogrk %r0,%r0,%r0 + ogrk %r0,%r0,%r15 + ogrk %r0,%r15,%r0 + ogrk %r15,%r0,%r0 + ogrk %r7,%r8,%r9 + #CHECK: ork %r0, %r0, %r0 # encoding: [0xb9,0xf6,0x00,0x00] #CHECK: ork %r0, %r0, %r15 # encoding: [0xb9,0xf6,0xf0,0x00] #CHECK: ork %r0, %r15, %r0 # encoding: [0xb9,0xf6,0x00,0x0f] @@ -103,6 +127,18 @@ srlk %r0,%r0,524287(%r1) srlk %r0,%r0,524287(%r15) +#CHECK: xgrk %r0, %r0, %r0 # encoding: [0xb9,0xe7,0x00,0x00] +#CHECK: xgrk %r0, %r0, %r15 # encoding: [0xb9,0xe7,0xf0,0x00] +#CHECK: xgrk %r0, %r15, %r0 # encoding: [0xb9,0xe7,0x00,0x0f] +#CHECK: xgrk %r15, %r0, %r0 # encoding: [0xb9,0xe7,0x00,0xf0] +#CHECK: xgrk %r7, %r8, %r9 # encoding: [0xb9,0xe7,0x90,0x78] + + xgrk %r0,%r0,%r0 + xgrk %r0,%r0,%r15 + xgrk %r0,%r15,%r0 + xgrk %r15,%r0,%r0 + xgrk %r7,%r8,%r9 + #CHECK: xrk %r0, %r0, %r0 # encoding: [0xb9,0xf7,0x00,0x00] #CHECK: xrk %r0, %r0, %r15 # encoding: [0xb9,0xf7,0xf0,0x00] #CHECK: xrk %r0, %r15, %r0 # encoding: [0xb9,0xf7,0x00,0x0f] -- 2.34.1