From 51c9043f3bc215bb3026486e5e1ef5989a8d8d8b Mon Sep 17 00:00:00 2001 From: Reed Kotler Date: Wed, 7 Aug 2013 04:00:26 +0000 Subject: [PATCH] Create a pattern for the "trap" instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187863 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/Mips16InstrFormats.td | 14 ++++++++++++++ lib/Target/Mips/Mips16InstrInfo.td | 15 +++++++++++++++ test/CodeGen/Mips/trap1.ll | 13 +++++++++++++ 3 files changed, 42 insertions(+) create mode 100644 test/CodeGen/Mips/trap1.ll diff --git a/lib/Target/Mips/Mips16InstrFormats.td b/lib/Target/Mips/Mips16InstrFormats.td index 1e499349800..da3a1f114af 100644 --- a/lib/Target/Mips/Mips16InstrFormats.td +++ b/lib/Target/Mips/Mips16InstrFormats.td @@ -148,6 +148,20 @@ class FRR16 _funct, dag outs, dag ins, string asmstr, let Inst{4-0} = funct; } +class FRRBreak16 pattern, InstrItinClass itin>: + MipsInst16 +{ + bits<6> Code; + bits<5> funct; + + let Opcode = 0b11101; + let funct = 0b00101; + + let Inst{10-5} = Code; + let Inst{4-0} = funct; +} + // // For conversion functions. // diff --git a/lib/Target/Mips/Mips16InstrInfo.td b/lib/Target/Mips/Mips16InstrInfo.td index 0edd225fbaf..aef4e9283e1 100644 --- a/lib/Target/Mips/Mips16InstrInfo.td +++ b/lib/Target/Mips/Mips16InstrInfo.td @@ -292,6 +292,11 @@ class FRR16_ins f, string asmstr, InstrItinClass itin> : !strconcat(asmstr, "\t$rx, $ry"), [], itin> { } +class FRRBreakNull16_ins : + FRRBreak16<(outs), (ins), asmstr, [], itin> { + let Code=0; +} + class FRR16R_ins f, string asmstr, InstrItinClass itin> : FRR16 { @@ -574,6 +579,13 @@ def BnezRxImm16: FRI16_B_ins<0b00101, "bnez", IIAlu>, cbranch16; // def BnezRxImmX16: FEXT_RI16_B_ins<0b00101, "bnez", IIAlu>, cbranch16; + +// +//Format: BREAK immediate +// Purpose: Breakpoint +// To cause a Breakpoint exception. + +def Break16: FRRBreakNull16_ins<"break 0", NoItinerary>; // // Format: BTEQZ offset MIPS16e // Purpose: Branch on T Equal to Zero (Extended) @@ -1796,3 +1808,6 @@ def : Mips16Pat<(i32 (extloadi8 addr16:$src)), (LbuRxRyOffMemX16 addr16:$src)>; def : Mips16Pat<(i32 (extloadi16 addr16:$src)), (LhuRxRyOffMemX16 addr16:$src)>; + +def: Mips16Pat<(trap), (Break16)>; + diff --git a/test/CodeGen/Mips/trap1.ll b/test/CodeGen/Mips/trap1.ll new file mode 100644 index 00000000000..bfcd7fed30d --- /dev/null +++ b/test/CodeGen/Mips/trap1.ll @@ -0,0 +1,13 @@ +; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=pic < %s | FileCheck %s -check-prefix=pic + +declare void @llvm.trap() + +; Function Attrs: nounwind optsize readnone +define i32 @main() { +entry: + call void @llvm.trap() + unreachable +; pic: break 0 + ret i32 0 +} + -- 2.34.1