From 4b667ee436404a241562c687b50b68a17147330a Mon Sep 17 00:00:00 2001 From: Chandler Carruth Date: Thu, 25 Sep 2014 11:03:55 +0000 Subject: [PATCH] [x86] Teach the new vector shuffle lowering to use AVX2 instructions for v4f64 and v8f32 shuffles when they are lane-crossing. We have fully general lane-crossing permutation functions in AVX2 that make this easy. Part of this also changes exactly when and how these vectors are split up when we don't have AVX2. This isn't always a win but it usually is a win, so on the balance I think its better. The primary regressions are all things that just need to be fixed anyways such as modeling when a blend can be completely accomplished via VINSERTF128, etc. Also, this highlights one of the few remaining big features: we do a really poor job of inserting elements into AVX registers efficiently. This completes almost all of the big tricks I have in mind for AVX2. The only things left that I plan to add: 1) element insertion smarts 2) palignr and other fairly specialized lowerings when they happen to apply git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218449 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 47 ++- test/CodeGen/X86/vector-shuffle-256-v4.ll | 199 +++++++----- test/CodeGen/X86/vector-shuffle-256-v8.ll | 354 ++++++++++++++-------- 3 files changed, 381 insertions(+), 219 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 16ebe684eaa..44cd07b72d1 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -9428,17 +9428,24 @@ static SDValue lowerV4F64VectorShuffle(SDValue Op, SDValue V1, SDValue V2, ArrayRef Mask = SVOp->getMask(); assert(Mask.size() == 4 && "Unexpected mask size for v4 shuffle!"); - if (is128BitLaneCrossingShuffleMask(MVT::v4f64, Mask)) + if (isSingleInputShuffleMask(Mask)) { + if (!is128BitLaneCrossingShuffleMask(MVT::v4f64, Mask)) { + // Non-half-crossing single input shuffles can be lowerid with an + // interleaved permutation. + unsigned VPERMILPMask = (Mask[0] == 1) | ((Mask[1] == 1) << 1) | + ((Mask[2] == 3) << 2) | ((Mask[3] == 3) << 3); + return DAG.getNode(X86ISD::VPERMILPI, DL, MVT::v4f64, V1, + DAG.getConstant(VPERMILPMask, MVT::i8)); + } + + // With AVX2 we have direct support for this permutation. + if (Subtarget->hasAVX2()) + return DAG.getNode(X86ISD::VPERMI, DL, MVT::v4f64, V1, + getV4X86ShuffleImm8ForMask(Mask, DAG)); + + // Otherwise, fall back. return lowerVectorShuffleAsLanePermuteAndBlend(DL, MVT::v4f64, V1, V2, Mask, DAG); - - if (isSingleInputShuffleMask(Mask)) { - // Non-half-crossing single input shuffles can be lowerid with an - // interleaved permutation. - unsigned VPERMILPMask = (Mask[0] == 1) | ((Mask[1] == 1) << 1) | - ((Mask[2] == 3) << 2) | ((Mask[3] == 3) << 3); - return DAG.getNode(X86ISD::VPERMILPI, DL, MVT::v4f64, V1, - DAG.getConstant(VPERMILPMask, MVT::i8)); } // X86 has dedicated unpack instructions that can handle specific blend @@ -9551,10 +9558,6 @@ static SDValue lowerV8F32VectorShuffle(SDValue Op, SDValue V1, SDValue V2, ArrayRef Mask = SVOp->getMask(); assert(Mask.size() == 8 && "Unexpected mask size for v8 shuffle!"); - if (is128BitLaneCrossingShuffleMask(MVT::v8f32, Mask)) - return lowerVectorShuffleAsLanePermuteAndBlend(DL, MVT::v8f32, V1, V2, Mask, - DAG); - if (SDValue Blend = lowerVectorShuffleAsBlend(DL, MVT::v8f32, V1, V2, Mask, Subtarget, DAG)) return Blend; @@ -9589,9 +9592,21 @@ static SDValue lowerV8F32VectorShuffle(SDValue Op, SDValue V1, SDValue V2, for (int i = 0; i < 8; ++i) VPermMask[i] = Mask[i] < 0 ? DAG.getUNDEF(MVT::i32) : DAG.getConstant(Mask[i], MVT::i32); - return DAG.getNode( - X86ISD::VPERMILPV, DL, MVT::v8f32, V1, - DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i32, VPermMask)); + if (!is128BitLaneCrossingShuffleMask(MVT::v8f32, Mask)) + return DAG.getNode( + X86ISD::VPERMILPV, DL, MVT::v8f32, V1, + DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i32, VPermMask)); + + if (Subtarget->hasAVX2()) + return DAG.getNode(X86ISD::VPERMV, DL, MVT::v8f32, + DAG.getNode(ISD::BITCAST, DL, MVT::v8f32, + DAG.getNode(ISD::BUILD_VECTOR, DL, + MVT::v8i32, VPermMask)), + V1); + + // Otherwise, fall back. + return lowerVectorShuffleAsLanePermuteAndBlend(DL, MVT::v8f32, V1, V2, Mask, + DAG); } // Otherwise fall back on generic blend lowering. diff --git a/test/CodeGen/X86/vector-shuffle-256-v4.ll b/test/CodeGen/X86/vector-shuffle-256-v4.ll index cca593912fb..423400c00a6 100644 --- a/test/CodeGen/X86/vector-shuffle-256-v4.ll +++ b/test/CodeGen/X86/vector-shuffle-256-v4.ll @@ -4,77 +4,112 @@ target triple = "x86_64-unknown-unknown" define <4 x double> @shuffle_v4f64_0001(<4 x double> %a, <4 x double> %b) { -; ALL-LABEL: @shuffle_v4f64_0001 -; ALL: # BB#0: -; ALL-NEXT: vunpcklpd {{.*}} # xmm1 = xmm0[0,0] -; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v4f64_0001 +; AVX1: # BB#0: +; AVX1-NEXT: vunpcklpd {{.*}} # xmm1 = xmm0[0,0] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v4f64_0001 +; AVX2: # BB#0: +; AVX2-NEXT: vpermpd {{.*}} # ymm0 = ymm0[0,0,0,1] +; AVX2-NEXT: retq %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> ret <4 x double> %shuffle } define <4 x double> @shuffle_v4f64_0020(<4 x double> %a, <4 x double> %b) { -; ALL-LABEL: @shuffle_v4f64_0020 -; ALL: # BB#0: -; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1 -; ALL-NEXT: vunpcklpd {{.*}} # xmm1 = xmm1[0],xmm0[0] -; ALL-NEXT: vunpcklpd {{.*}} # xmm0 = xmm0[0,0] -; ALL-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v4f64_0020 +; AVX1: # BB#0: +; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 +; AVX1-NEXT: vunpcklpd {{.*}} # xmm1 = xmm1[0],xmm0[0] +; AVX1-NEXT: vunpcklpd {{.*}} # xmm0 = xmm0[0,0] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v4f64_0020 +; AVX2: # BB#0: +; AVX2-NEXT: vpermpd {{.*}} # ymm0 = ymm0[0,0,2,0] +; AVX2-NEXT: retq %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> ret <4 x double> %shuffle } define <4 x double> @shuffle_v4f64_0300(<4 x double> %a, <4 x double> %b) { -; ALL-LABEL: @shuffle_v4f64_0300 -; ALL: # BB#0: -; ALL-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1] -; ALL-NEXT: vpermilpd {{.*}} # ymm1 = ymm1[0,1,2,2] -; ALL-NEXT: vblendpd {{.*}} # ymm0 = ymm0[0],ymm1[1,2,3] -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v4f64_0300 +; AVX1: # BB#0: +; AVX1-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1] +; AVX1-NEXT: vpermilpd {{.*}} # ymm1 = ymm1[0,1,2,2] +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm0[0],ymm1[1,2,3] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v4f64_0300 +; AVX2: # BB#0: +; AVX2-NEXT: vpermpd {{.*}} # ymm0 = ymm0[0,3,0,0] +; AVX2-NEXT: retq %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> ret <4 x double> %shuffle } define <4 x double> @shuffle_v4f64_1000(<4 x double> %a, <4 x double> %b) { -; ALL-LABEL: @shuffle_v4f64_1000 -; ALL: # BB#0: -; ALL-NEXT: vpermilpd {{.*}} # xmm1 = xmm0[1,0] -; ALL-NEXT: vunpcklpd {{.*}} # xmm0 = xmm0[0,0] -; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v4f64_1000 +; AVX1: # BB#0: +; AVX1-NEXT: vpermilpd {{.*}} # xmm1 = xmm0[1,0] +; AVX1-NEXT: vunpcklpd {{.*}} # xmm0 = xmm0[0,0] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v4f64_1000 +; AVX2: # BB#0: +; AVX2-NEXT: vpermpd {{.*}} # ymm0 = ymm0[1,0,0,0] +; AVX2-NEXT: retq %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> ret <4 x double> %shuffle } define <4 x double> @shuffle_v4f64_2200(<4 x double> %a, <4 x double> %b) { -; ALL-LABEL: @shuffle_v4f64_2200 -; ALL: # BB#0: -; ALL-NEXT: vperm2f128 {{.*}} # ymm0 = ymm0[2,3,0,1] -; ALL-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[0,0,2,2] -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v4f64_2200 +; AVX1: # BB#0: +; AVX1-NEXT: vperm2f128 {{.*}} # ymm0 = ymm0[2,3,0,1] +; AVX1-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[0,0,2,2] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v4f64_2200 +; AVX2: # BB#0: +; AVX2-NEXT: vpermpd {{.*}} # ymm0 = ymm0[2,2,0,0] +; AVX2-NEXT: retq %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> ret <4 x double> %shuffle } define <4 x double> @shuffle_v4f64_3330(<4 x double> %a, <4 x double> %b) { -; ALL-LABEL: @shuffle_v4f64_3330 -; ALL: # BB#0: -; ALL-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1] -; ALL-NEXT: vpermilpd {{.*}} # ymm1 = ymm1[1,1,2,2] -; ALL-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[0,0,3,2] -; ALL-NEXT: vblendpd {{.*}} # ymm0 = ymm1[0,1],ymm0[2],ymm1[3] -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v4f64_3330 +; AVX1: # BB#0: +; AVX1-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1] +; AVX1-NEXT: vpermilpd {{.*}} # ymm1 = ymm1[1,1,2,2] +; AVX1-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[0,0,3,2] +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm1[0,1],ymm0[2],ymm1[3] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v4f64_3330 +; AVX2: # BB#0: +; AVX2-NEXT: vpermpd {{.*}} # ymm0 = ymm0[3,3,3,0] +; AVX2-NEXT: retq %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> ret <4 x double> %shuffle } define <4 x double> @shuffle_v4f64_3210(<4 x double> %a, <4 x double> %b) { -; ALL-LABEL: @shuffle_v4f64_3210 -; ALL: # BB#0: -; ALL-NEXT: vperm2f128 {{.*}} # ymm0 = ymm0[2,3,0,1] -; ALL-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[1,0,3,2] -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v4f64_3210 +; AVX1: # BB#0: +; AVX1-NEXT: vperm2f128 {{.*}} # ymm0 = ymm0[2,3,0,1] +; AVX1-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[1,0,3,2] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v4f64_3210 +; AVX2: # BB#0: +; AVX2-NEXT: vpermpd {{.*}} # ymm0 = ymm0[3,2,1,0] +; AVX2-NEXT: retq %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> ret <4 x double> %shuffle } @@ -218,19 +253,33 @@ define <4 x double> @shuffle_v4f64_4163(<4 x double> %a, <4 x double> %b) { } define <4 x double> @shuffle_v4f64_0145(<4 x double> %a, <4 x double> %b) { -; ALL-LABEL: @shuffle_v4f64_0145 -; ALL: # BB#0: -; ALL-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v4f64_0145 +; AVX1: # BB#0: +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1 +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm0[0,1],ymm1[2,3] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v4f64_0145 +; AVX2: # BB#0: +; AVX2-NEXT: vpermpd {{.*}} # ymm1 = ymm1[0,1,0,1] +; AVX2-NEXT: vblendpd {{.*}} # ymm0 = ymm0[0,1],ymm1[2,3] +; AVX2-NEXT: retq %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> ret <4 x double> %shuffle } define <4 x double> @shuffle_v4f64_4501(<4 x double> %a, <4 x double> %b) { -; ALL-LABEL: @shuffle_v4f64_4501 -; ALL: # BB#0: -; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v4f64_4501 +; AVX1: # BB#0: +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm1[0,1],ymm0[2,3] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v4f64_4501 +; AVX2: # BB#0: +; AVX2-NEXT: vpermpd {{.*}} # ymm0 = ymm0[0,1,0,1] +; AVX2-NEXT: vblendpd {{.*}} # ymm0 = ymm1[0,1],ymm0[2,3] +; AVX2-NEXT: retq %shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> ret <4 x double> %shuffle } @@ -374,10 +423,9 @@ define <4 x i64> @shuffle_v4i64_3210(<4 x i64> %a, <4 x i64> %b) { define <4 x i64> @shuffle_v4i64_0124(<4 x i64> %a, <4 x i64> %b) { ; AVX1-LABEL: @shuffle_v4i64_0124 ; AVX1: # BB#0: -; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vunpcklpd {{.*}} # xmm1 = xmm1[0,0] -; AVX1-NEXT: vblendpd {{.*}} # xmm1 = xmm2[0],xmm1[1] -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1 +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm0[0,1,2],ymm1[3] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v4i64_0124 @@ -392,10 +440,9 @@ define <4 x i64> @shuffle_v4i64_0124(<4 x i64> %a, <4 x i64> %b) { define <4 x i64> @shuffle_v4i64_0142(<4 x i64> %a, <4 x i64> %b) { ; AVX1-LABEL: @shuffle_v4i64_0142 ; AVX1: # BB#0: -; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 -; AVX1-NEXT: vunpcklpd {{.*}} # xmm2 = xmm2[0,0] -; AVX1-NEXT: vblendpd {{.*}} # xmm1 = xmm1[0],xmm2[1] -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1 +; AVX1-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[0,1,2,2] +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm0[0,1],ymm1[2],ymm0[3] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v4i64_0142 @@ -413,9 +460,9 @@ define <4 x i64> @shuffle_v4i64_0412(<4 x i64> %a, <4 x i64> %b) { ; AVX1: # BB#0: ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vshufpd {{.*}} # xmm2 = xmm0[1],xmm2[0] -; AVX1-NEXT: vunpcklpd {{.*}} # xmm1 = xmm1[0,0] -; AVX1-NEXT: vblendpd {{.*}} # xmm0 = xmm0[0],xmm1[1] ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vpermilpd {{.*}} # ymm1 = ymm1[0,0,2,2] +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2,3] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v4i64_0412 @@ -434,8 +481,8 @@ define <4 x i64> @shuffle_v4i64_4012(<4 x i64> %a, <4 x i64> %b) { ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vshufpd {{.*}} # xmm2 = xmm0[1],xmm2[0] ; AVX1-NEXT: vunpcklpd {{.*}} # xmm0 = xmm0[0,0] -; AVX1-NEXT: vblendpd {{.*}} # xmm0 = xmm1[0],xmm0[1] ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm1[0],ymm0[1,2,3] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v4i64_4012 @@ -450,7 +497,8 @@ define <4 x i64> @shuffle_v4i64_4012(<4 x i64> %a, <4 x i64> %b) { define <4 x i64> @shuffle_v4i64_0145(<4 x i64> %a, <4 x i64> %b) { ; AVX1-LABEL: @shuffle_v4i64_0145 ; AVX1: # BB#0: -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1 +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm0[0,1],ymm1[2,3] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v4i64_0145 @@ -465,11 +513,11 @@ define <4 x i64> @shuffle_v4i64_0145(<4 x i64> %a, <4 x i64> %b) { define <4 x i64> @shuffle_v4i64_0451(<4 x i64> %a, <4 x i64> %b) { ; AVX1-LABEL: @shuffle_v4i64_0451 ; AVX1: # BB#0: -; AVX1-NEXT: vpermilpd {{.*}} # xmm2 = xmm1[1,0] -; AVX1-NEXT: vblendpd {{.*}} # xmm2 = xmm2[0],xmm0[1] -; AVX1-NEXT: vunpcklpd {{.*}} # xmm1 = xmm1[0,0] -; AVX1-NEXT: vblendpd {{.*}} # xmm0 = xmm0[0],xmm1[1] -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX1-NEXT: vunpcklpd {{.*}} # xmm2 = xmm1[0,0] +; AVX1-NEXT: vpermilpd {{.*}} # xmm1 = xmm1[1,0] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm0[0],ymm1[1,2],ymm0[3] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v4i64_0451 @@ -485,7 +533,8 @@ define <4 x i64> @shuffle_v4i64_0451(<4 x i64> %a, <4 x i64> %b) { define <4 x i64> @shuffle_v4i64_4501(<4 x i64> %a, <4 x i64> %b) { ; AVX1-LABEL: @shuffle_v4i64_4501 ; AVX1: # BB#0: -; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm1[0,1],ymm0[2,3] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v4i64_4501 @@ -500,11 +549,11 @@ define <4 x i64> @shuffle_v4i64_4501(<4 x i64> %a, <4 x i64> %b) { define <4 x i64> @shuffle_v4i64_4015(<4 x i64> %a, <4 x i64> %b) { ; AVX1-LABEL: @shuffle_v4i64_4015 ; AVX1: # BB#0: -; AVX1-NEXT: vpermilpd {{.*}} # xmm2 = xmm0[1,0] -; AVX1-NEXT: vblendpd {{.*}} # xmm2 = xmm2[0],xmm1[1] -; AVX1-NEXT: vunpcklpd {{.*}} # xmm0 = xmm0[0,0] -; AVX1-NEXT: vblendpd {{.*}} # xmm0 = xmm1[0],xmm0[1] -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; AVX1-NEXT: vunpcklpd {{.*}} # xmm2 = xmm0[0,0] +; AVX1-NEXT: vpermilpd {{.*}} # xmm0 = xmm0[1,0] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm1[0],ymm0[1,2],ymm1[3] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v4i64_4015 @@ -526,10 +575,10 @@ define <4 x i64> @stress_test1(<4 x i64> %a, <4 x i64> %b) { ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 ; AVX1-NEXT: vpermilpd {{.*}} # xmm1 = xmm1[1,0] ; AVX1-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[1,1,3,2] -; AVX1-NEXT: vpermilpd {{.*}} # xmm0 = xmm0[1,0] -; AVX1-NEXT: vblendpd {{.*}} # xmm0 = xmm0[0],xmm1[1] -; AVX1-NEXT: vpermilpd {{.*}} # xmm1 = xmm1[1,0] -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX1-NEXT: vpermilpd {{.*}} # xmm2 = xmm1[1,0] +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 +; AVX1-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[1,0,2,2] +; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm0[0],ymm1[1,2,3] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @stress_test1 diff --git a/test/CodeGen/X86/vector-shuffle-256-v8.ll b/test/CodeGen/X86/vector-shuffle-256-v8.ll index 38c75fe093c..7e69ac5c537 100644 --- a/test/CodeGen/X86/vector-shuffle-256-v8.ll +++ b/test/CodeGen/X86/vector-shuffle-256-v8.ll @@ -4,92 +4,144 @@ target triple = "x86_64-unknown-unknown" define <8 x float> @shuffle_v8f32_00000000(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_00000000 -; ALL: # BB#0: -; ALL-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,0,0,0] -; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_00000000 +; AVX1: # BB#0: +; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,0,0,0] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_00000000 +; AVX2: # BB#0: +; AVX2-NEXT: vxorps %ymm1, %ymm1, %ymm1 +; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_00000010(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_00000010 -; ALL: # BB#0: -; ALL-NEXT: vpermilps {{.*}} # xmm1 = xmm0[0,0,0,0] -; ALL-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,0,1,0] -; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_00000010 +; AVX1: # BB#0: +; AVX1-NEXT: vpermilps {{.*}} # xmm1 = xmm0[0,0,0,0] +; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,0,1,0] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_00000010 +; AVX2: # BB#0: +; AVX2-NEXT: vmovaps {{.*}} # ymm1 = [0,0,0,0,0,0,1,0] +; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_00000200(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_00000200 -; ALL: # BB#0: -; ALL-NEXT: vpermilps {{.*}} # xmm1 = xmm0[0,0,0,0] -; ALL-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,2,0,0] -; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_00000200 +; AVX1: # BB#0: +; AVX1-NEXT: vpermilps {{.*}} # xmm1 = xmm0[0,0,0,0] +; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,2,0,0] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_00000200 +; AVX2: # BB#0: +; AVX2-NEXT: vmovaps {{.*}} # ymm1 = [0,0,0,0,0,2,0,0] +; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_00003000(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_00003000 -; ALL: # BB#0: -; ALL-NEXT: vpermilps {{.*}} # xmm1 = xmm0[0,0,0,0] -; ALL-NEXT: vpermilps {{.*}} # xmm0 = xmm0[3,0,0,0] -; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_00003000 +; AVX1: # BB#0: +; AVX1-NEXT: vpermilps {{.*}} # xmm1 = xmm0[0,0,0,0] +; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[3,0,0,0] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_00003000 +; AVX2: # BB#0: +; AVX2-NEXT: vmovaps {{.*}} # ymm1 = [0,0,0,0,3,0,0,0] +; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_00040000(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_00040000 -; ALL: # BB#0: -; ALL-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1] -; ALL-NEXT: vpermilps {{.*}} # ymm1 = ymm1[0,0,0,0,4,4,4,4] -; ALL-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,0,0,3,4,4,4,7] -; ALL-NEXT: vblendps {{.*}} # ymm0 = ymm0[0,1,2],ymm1[3,4,5,6,7] -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_00040000 +; AVX1: # BB#0: +; AVX1-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1] +; AVX1-NEXT: vpermilps {{.*}} # ymm1 = ymm1[0,0,0,0,4,4,4,4] +; AVX1-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,0,0,3,4,4,4,7] +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0,1,2],ymm1[3,4,5,6,7] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_00040000 +; AVX2: # BB#0: +; AVX2-NEXT: vmovaps {{.*}} # ymm1 = [0,0,0,4,0,0,0,0] +; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_00500000(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_00500000 -; ALL: # BB#0: -; ALL-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1] -; ALL-NEXT: vpermilps {{.*}} # ymm1 = ymm1[u,u,1,u,4,4,4,4] -; ALL-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,0,2,0,4,4,6,4] -; ALL-NEXT: vblendps {{.*}} # ymm0 = ymm0[0,1],ymm1[2],ymm0[3],ymm1[4,5,6,7] -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_00500000 +; AVX1: # BB#0: +; AVX1-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1] +; AVX1-NEXT: vpermilps {{.*}} # ymm1 = ymm1[u,u,1,u,4,4,4,4] +; AVX1-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,0,2,0,4,4,6,4] +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0,1],ymm1[2],ymm0[3],ymm1[4,5,6,7] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_00500000 +; AVX2: # BB#0: +; AVX2-NEXT: vmovaps {{.*}} # ymm1 = [0,0,5,0,0,0,0,0] +; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_06000000(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_06000000 -; ALL: # BB#0: -; ALL-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1] -; ALL-NEXT: vpermilps {{.*}} # ymm1 = ymm1[u,2,u,u,4,4,4,4] -; ALL-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,1,0,0,4,5,4,4] -; ALL-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2,3],ymm1[4,5,6,7] -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_06000000 +; AVX1: # BB#0: +; AVX1-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1] +; AVX1-NEXT: vpermilps {{.*}} # ymm1 = ymm1[u,2,u,u,4,4,4,4] +; AVX1-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,1,0,0,4,5,4,4] +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2,3],ymm1[4,5,6,7] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_06000000 +; AVX2: # BB#0: +; AVX2-NEXT: vmovaps {{.*}} # ymm1 = [0,6,0,0,0,0,0,0] +; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_70000000(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_70000000 -; ALL: # BB#0: -; ALL-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1] -; ALL-NEXT: vpermilps {{.*}} # ymm1 = ymm1[3,u,u,u,4,4,4,4] -; ALL-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,0,0,0,4,4,4,4] -; ALL-NEXT: vblendps {{.*}} # ymm0 = ymm1[0],ymm0[1,2,3],ymm1[4,5,6,7] -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_70000000 +; AVX1: # BB#0: +; AVX1-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1] +; AVX1-NEXT: vpermilps {{.*}} # ymm1 = ymm1[3,u,u,u,4,4,4,4] +; AVX1-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,0,0,0,4,4,4,4] +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm1[0],ymm0[1,2,3],ymm1[4,5,6,7] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_70000000 +; AVX2: # BB#0: +; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 +; AVX2-NEXT: movl $7, %eax +; AVX2-NEXT: vpinsrd $0, %eax, %xmm1, %xmm1 +; AVX2-NEXT: vpxor %ymm2, %ymm2, %ymm2 +; AVX2-NEXT: vinserti128 $0, %xmm1, %ymm2, %ymm1 +; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } @@ -104,23 +156,35 @@ define <8 x float> @shuffle_v8f32_01014545(<8 x float> %a, <8 x float> %b) { } define <8 x float> @shuffle_v8f32_00112233(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_00112233 -; ALL: # BB#0: -; ALL-NEXT: vunpcklps {{.*}} # xmm1 = xmm0[0,0,1,1] -; ALL-NEXT: vunpckhps {{.*}} # xmm0 = xmm0[2,2,3,3] -; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_00112233 +; AVX1: # BB#0: +; AVX1-NEXT: vunpcklps {{.*}} # xmm1 = xmm0[0,0,1,1] +; AVX1-NEXT: vunpckhps {{.*}} # xmm0 = xmm0[2,2,3,3] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_00112233 +; AVX2: # BB#0: +; AVX2-NEXT: vmovaps {{.*}} # ymm1 = [0,0,1,1,2,2,3,3] +; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_00001111(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_00001111 -; ALL: # BB#0: -; ALL-NEXT: vpermilps {{.*}} # xmm1 = xmm0[0,0,0,0] -; ALL-NEXT: vpermilps {{.*}} # xmm0 = xmm0[1,1,1,1] -; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_00001111 +; AVX1: # BB#0: +; AVX1-NEXT: vpermilps {{.*}} # xmm1 = xmm0[0,0,0,0] +; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[1,1,1,1] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_00001111 +; AVX2: # BB#0: +; AVX2-NEXT: vmovaps {{.*}} # ymm1 = [0,0,0,0,1,1,1,1] +; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } @@ -135,13 +199,22 @@ define <8 x float> @shuffle_v8f32_81a3c5e7(<8 x float> %a, <8 x float> %b) { } define <8 x float> @shuffle_v8f32_08080808(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_08080808 -; ALL: # BB#0: -; ALL-NEXT: vpermilps {{.*}} # xmm1 = xmm1[0,0,2,0] -; ALL-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,1,0,3] -; ALL-NEXT: vblendps {{.*}} # xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] -; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_08080808 +; AVX1: # BB#0: +; AVX1-NEXT: vpermilps {{.*}} # xmm1 = xmm1[0,0,2,0] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,1,0,3] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_08080808 +; AVX2: # BB#0: +; AVX2-NEXT: vxorps %ymm2, %ymm2, %ymm2 +; AVX2-NEXT: vpermps %ymm1, %ymm2, %ymm1 +; AVX2-NEXT: vpermps %ymm0, %ymm2, %ymm0 +; AVX2-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } @@ -202,57 +275,85 @@ define <8 x float> @shuffle_v8f32_2a3b6e7f(<8 x float> %a, <8 x float> %b) { } define <8 x float> @shuffle_v8f32_08192a3b(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_08192a3b -; ALL: # BB#0: -; ALL-NEXT: vpermilps {{.*}} # xmm2 = xmm1[0,2,2,3] -; ALL-NEXT: vpermilps {{.*}} # xmm3 = xmm0[2,1,3,3] -; ALL-NEXT: vblendps {{.*}} # xmm2 = xmm3[0],xmm2[1],xmm3[2],xmm2[3] -; ALL-NEXT: vpermilps {{.*}} # xmm1 = xmm1[0,0,2,1] -; ALL-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,1,1,3] -; ALL-NEXT: vblendps {{.*}} # xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] -; ALL-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_08192a3b +; AVX1: # BB#0: +; AVX1-NEXT: vpermilps {{.*}} # xmm2 = xmm1[0,0,2,1] +; AVX1-NEXT: vpermilps {{.*}} # xmm1 = xmm1[0,2,2,3] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 +; AVX1-NEXT: vpermilps {{.*}} # xmm2 = xmm0[0,1,1,3] +; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[2,1,3,3] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_08192a3b +; AVX2: # BB#0: +; AVX2-NEXT: vmovaps {{.*}} # ymm2 = +; AVX2-NEXT: vpermps %ymm1, %ymm2, %ymm1 +; AVX2-NEXT: vmovaps {{.*}} # ymm2 = <0,u,1,u,2,u,3,u> +; AVX2-NEXT: vpermps %ymm0, %ymm2, %ymm0 +; AVX2-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_08991abb(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_08991abb -; ALL: # BB#0: -; ALL-NEXT: vpermilps {{.*}} # xmm2 = xmm0[1,1,2,3] -; ALL-NEXT: vpermilps {{.*}} # xmm3 = xmm1[0,2,3,3] -; ALL-NEXT: vblendps {{.*}} # xmm2 = xmm2[0],xmm3[1,2,3] -; ALL-NEXT: vunpcklps {{.*}} # xmm1 = xmm1[0,0,1,1] -; ALL-NEXT: vblendps {{.*}} # xmm0 = xmm0[0],xmm1[1,2,3] -; ALL-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_08991abb +; AVX1: # BB#0: +; AVX1-NEXT: vpermilps {{.*}} # xmm2 = xmm0[1,1,2,3] +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vunpcklps {{.*}} # xmm2 = xmm1[0,0,1,1] +; AVX1-NEXT: vpermilps {{.*}} # xmm1 = xmm1[0,2,3,3] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_08991abb +; AVX2: # BB#0: +; AVX2-NEXT: vmovaps {{.*}} # ymm2 = <0,u,u,u,1,u,u,u> +; AVX2-NEXT: vpermps %ymm0, %ymm2, %ymm0 +; AVX2-NEXT: vmovaps {{.*}} # ymm2 = +; AVX2-NEXT: vpermps %ymm1, %ymm2, %ymm1 +; AVX2-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_091b2d3f(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_091b2d3f -; ALL: # BB#0: -; ALL-NEXT: vextractf128 $1, %ymm1, %xmm2 -; ALL-NEXT: vpermilps {{.*}} # xmm3 = xmm0[2,1,3,3] -; ALL-NEXT: vblendps {{.*}} # xmm2 = xmm3[0],xmm2[1],xmm3[2],xmm2[3] -; ALL-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,1,1,3] -; ALL-NEXT: vblendps {{.*}} # xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] -; ALL-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_091b2d3f +; AVX1: # BB#0: +; AVX1-NEXT: vpermilps {{.*}} # xmm2 = xmm0[0,1,1,3] +; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[2,1,3,3] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_091b2d3f +; AVX2: # BB#0: +; AVX2-NEXT: vmovaps {{.*}} # ymm2 = <0,u,1,u,2,u,3,u> +; AVX2-NEXT: vpermps %ymm0, %ymm2, %ymm0 +; AVX2-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } define <8 x float> @shuffle_v8f32_09ab1def(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: @shuffle_v8f32_09ab1def -; ALL: # BB#0: -; ALL-NEXT: vextractf128 $1, %ymm1, %xmm2 -; ALL-NEXT: vpermilps {{.*}} # xmm3 = xmm0[1,1,2,3] -; ALL-NEXT: vblendps {{.*}} # xmm2 = xmm3[0],xmm2[1,2,3] -; ALL-NEXT: vblendps {{.*}} # xmm0 = xmm0[0],xmm1[1,2,3] -; ALL-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 -; ALL-NEXT: retq +; AVX1-LABEL: @shuffle_v8f32_09ab1def +; AVX1: # BB#0: +; AVX1-NEXT: vpermilps {{.*}} # xmm2 = xmm0[1,1,2,3] +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] +; AVX1-NEXT: retq +; +; AVX2-LABEL: @shuffle_v8f32_09ab1def +; AVX2: # BB#0: +; AVX2-NEXT: vmovaps {{.*}} # ymm2 = <0,u,u,u,1,u,u,u> +; AVX2-NEXT: vpermps %ymm0, %ymm2, %ymm0 +; AVX2-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] +; AVX2-NEXT: retq %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %shuffle } @@ -754,9 +855,10 @@ define <8 x i32> @shuffle_v8i32_08080808(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: @shuffle_v8i32_08080808 ; AVX1: # BB#0: ; AVX1-NEXT: vpermilps {{.*}} # xmm1 = xmm1[0,0,2,0] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 ; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,1,0,3] -; AVX1-NEXT: vblendps {{.*}} # xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v8i32_08080808 @@ -865,13 +967,13 @@ define <8 x i32> @shuffle_v8i32_2a3b6e7f(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_08192a3b(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: @shuffle_v8i32_08192a3b ; AVX1: # BB#0: -; AVX1-NEXT: vpermilps {{.*}} # xmm2 = xmm1[0,2,2,3] -; AVX1-NEXT: vpermilps {{.*}} # xmm3 = xmm0[2,1,3,3] -; AVX1-NEXT: vblendps {{.*}} # xmm2 = xmm3[0],xmm2[1],xmm3[2],xmm2[3] -; AVX1-NEXT: vpermilps {{.*}} # xmm1 = xmm1[0,0,2,1] -; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,1,1,3] -; AVX1-NEXT: vblendps {{.*}} # xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vpermilps {{.*}} # xmm2 = xmm1[0,0,2,1] +; AVX1-NEXT: vpermilps {{.*}} # xmm1 = xmm1[0,2,2,3] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 +; AVX1-NEXT: vpermilps {{.*}} # xmm2 = xmm0[0,1,1,3] +; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[2,1,3,3] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v8i32_08192a3b @@ -890,11 +992,11 @@ define <8 x i32> @shuffle_v8i32_08991abb(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: @shuffle_v8i32_08991abb ; AVX1: # BB#0: ; AVX1-NEXT: vpermilps {{.*}} # xmm2 = xmm0[1,1,2,3] -; AVX1-NEXT: vpermilps {{.*}} # xmm3 = xmm1[0,2,3,3] -; AVX1-NEXT: vblendps {{.*}} # xmm2 = xmm2[0],xmm3[1,2,3] -; AVX1-NEXT: vunpcklps {{.*}} # xmm1 = xmm1[0,0,1,1] -; AVX1-NEXT: vblendps {{.*}} # xmm0 = xmm0[0],xmm1[1,2,3] ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vunpcklps {{.*}} # xmm2 = xmm1[0,0,1,1] +; AVX1-NEXT: vpermilps {{.*}} # xmm1 = xmm1[0,2,3,3] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v8i32_08991abb @@ -912,12 +1014,10 @@ define <8 x i32> @shuffle_v8i32_08991abb(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_091b2d3f(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: @shuffle_v8i32_091b2d3f ; AVX1: # BB#0: -; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 -; AVX1-NEXT: vpermilps {{.*}} # xmm3 = xmm0[2,1,3,3] -; AVX1-NEXT: vblendps {{.*}} # xmm2 = xmm3[0],xmm2[1],xmm3[2],xmm2[3] -; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,1,1,3] -; AVX1-NEXT: vblendps {{.*}} # xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vpermilps {{.*}} # xmm2 = xmm0[0,1,1,3] +; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[2,1,3,3] +; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v8i32_091b2d3f @@ -933,11 +1033,9 @@ define <8 x i32> @shuffle_v8i32_091b2d3f(<8 x i32> %a, <8 x i32> %b) { define <8 x i32> @shuffle_v8i32_09ab1def(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: @shuffle_v8i32_09ab1def ; AVX1: # BB#0: -; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 -; AVX1-NEXT: vpermilps {{.*}} # xmm3 = xmm0[1,1,2,3] -; AVX1-NEXT: vblendps {{.*}} # xmm2 = xmm3[0],xmm2[1,2,3] -; AVX1-NEXT: vblendps {{.*}} # xmm0 = xmm0[0],xmm1[1,2,3] +; AVX1-NEXT: vpermilps {{.*}} # xmm2 = xmm0[1,1,2,3] ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7] ; AVX1-NEXT: retq ; ; AVX2-LABEL: @shuffle_v8i32_09ab1def -- 2.34.1