From 4946399b6432db1cacb647cbca25178ca2a5f02b Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 29 Nov 2006 23:46:27 +0000 Subject: [PATCH] Clean up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32027 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelDAGToDAG.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index e711d22ed52..09f07d01caa 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -643,11 +643,13 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM, // For X86-64 PIC code, only allow GV / CP + displacement so we can use RIP // relative addressing mode. - if ((!Subtarget->is64Bit() || TM.getCodeModel() == CodeModel::Small) && - (!Available || (AM.Base.Reg.Val && AM.IndexReg.Val))) { + if (Subtarget->is64Bit() && TM.getCodeModel() != CodeModel::Small) + break; + if (!Available || (AM.Base.Reg.Val && AM.IndexReg.Val)) { bool isRIP = Subtarget->is64Bit(); - if (isRIP && (AM.Base.Reg.Val || AM.Scale > 1 || AM.IndexReg.Val || - AM.BaseType == X86ISelAddressMode::FrameIndexBase)) + if (isRIP && + (AM.Base.Reg.Val || AM.Scale > 1 || AM.IndexReg.Val || + AM.BaseType == X86ISelAddressMode::FrameIndexBase)) break; if (ConstantPoolSDNode *CP = dyn_cast(N.getOperand(0))) { @@ -655,8 +657,7 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM, AM.CP = CP->getConstVal(); AM.Align = CP->getAlignment(); AM.Disp += CP->getOffset(); - if (isRIP) - AM.isRIPRel = true; + AM.isRIPRel = isRIP; return false; } } else if (GlobalAddressSDNode *G = @@ -664,8 +665,7 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM, if (AM.GV == 0) { AM.GV = G->getGlobal(); AM.Disp += G->getOffset(); - if (isRIP) - AM.isRIPRel = true; + AM.isRIPRel = isRIP; return false; } } else if (isRoot && isRIP) { -- 2.34.1