From 413ec720f5b4375b02dbfd2b68bced3893b6abbd Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Mon, 25 Apr 2016 09:50:16 +0800 Subject: [PATCH] Documentation: bindings: add more configuration for rockchip emmc phy This patch add some optional configuration for dt. freq-sel can be used to decide the phy sample clk in order to match the real freq of emmc controller. dr-sel can be configured to match the requirement of different drive strength of phy IO. opdelay should be used to adjust the output delay for clk IO and data IO, which is useful for sloving timing issue. Change-Id: I0b4da111581c76fbb96b15cd6be653aaa4843c33 Signed-off-by: Shawn Lin --- .../devicetree/bindings/phy/rockchip-emmc-phy.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt index 7e6d0e193d90..a962fafc62ba 100644 --- a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt +++ b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt @@ -9,6 +9,13 @@ Required properties: - reg-offset: PHY configure reg address offset in "general register files" +Optional Properties: + - freq-sel: must match the freq of emmc clock, only support the + following frequency: 50000000, 100000000, 150000000, 200000000. + If not assigned any freq, default use 200000000Hz. + - dr-sel: select the drive strength of phy IO. + - opdelay: select the output delay count number for clk IO and data IO + Example: emmcphy: phy { -- 2.34.1