From 3eab2d1f26506b62fae1d634376be691880081c8 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 7 Oct 2015 01:36:00 +0000 Subject: [PATCH] AMDGPU: Add comment for VOP2b operand class Because of the constant bus requirement, it is never legal to use a literal constant for these instructions despite the encoding allowing it. This was already doing the right thing, but note why. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249500 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/SIInstrInfo.td | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/lib/Target/AMDGPU/SIInstrInfo.td b/lib/Target/AMDGPU/SIInstrInfo.td index ce1d081f437..61e9022c47b 100644 --- a/lib/Target/AMDGPU/SIInstrInfo.td +++ b/lib/Target/AMDGPU/SIInstrInfo.td @@ -1187,6 +1187,11 @@ def VOP2b_I32_I1_I32_I32 : VOPProfile<[i32, i32, i32, untyped]> { // Write out to vcc or arbitrary SGPR and read in from vcc or // arbitrary SGPR. def VOP2b_I32_I1_I32_I32_I1 : VOPProfile<[i32, i32, i32, i1]> { + // We use VCSrc_32 to exclude literal constants, even though the + // encoding normally allows them since the implicit VCC use means + // using one would always violate the constant bus + // restriction. SGPRs are still allowed because it should + // technically be possible to use VCC again as src0. let Src0RC32 = VCSrc_32; let Asm32 = "$dst, vcc, $src0, $src1, vcc"; let Asm64 = "$dst, $sdst, $src0, $src1, $src2"; -- 2.34.1