From 3b14a5c5469176effb921d91d4494f0aa2919fd0 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Thu, 14 Jul 2011 18:35:38 +0000 Subject: [PATCH] Update ARM Assembly of LDM/STM. ldm/stm are the cannonical spellings for ldmia/stmia, so use them as such. Update the parsing/encoding tests accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135168 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrInfo.td | 13 ++++--- test/MC/ARM/arm_instructions.s | 44 --------------------- test/MC/ARM/basic-arm-instructions.s | 58 ++++++++++++++++++++++++++++ 3 files changed, 66 insertions(+), 49 deletions(-) diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 7e5d1363dcb..445ef6cd211 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1975,10 +1975,12 @@ def STRHT: AI3sthpo<(outs GPR:$base_wb), (ins GPR:$Rt, addrmode3:$addr), multiclass arm_ldst_mult { + // IA is the default, so no need for an explicit suffix on the + // mnemonic here. Without it is the cannonical spelling. def IA : AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), IndexModeNone, f, itin, - !strconcat(asm, "ia${p}\t$Rn, $regs"), "", []> { + !strconcat(asm, "${p}\t$Rn, $regs"), "", []> { let Inst{24-23} = 0b01; // Increment After let Inst{21} = 0; // No writeback let Inst{20} = L_bit; @@ -1986,7 +1988,7 @@ multiclass arm_ldst_mult { + !strconcat(asm, "${p}\t$Rn!, $regs"), "$Rn = $wb", []> { let Inst{24-23} = 0b01; // Increment After let Inst{21} = 1; // Writeback let Inst{20} = L_bit; @@ -2052,10 +2054,11 @@ defm STM : arm_ldst_mult<"stm", 0, LdStMulFrm, IIC_iStore_m, IIC_iStore_mu>; } // neverHasSideEffects // Load / Store Multiple Mnemonic Aliases -def : MnemonicAlias<"ldmfd", "ldmia">; +def : MnemonicAlias<"ldmfd", "ldm">; +def : MnemonicAlias<"ldmia", "ldm">; def : MnemonicAlias<"stmfd", "stmdb">; -def : MnemonicAlias<"ldm", "ldmia">; -def : MnemonicAlias<"stm", "stmia">; +def : MnemonicAlias<"stmia", "stm">; +def : MnemonicAlias<"stmea", "stm">; // FIXME: remove when we have a way to marking a MI with these properties. // FIXME: Should pc be an implicit operand like PICADD, etc? diff --git a/test/MC/ARM/arm_instructions.s b/test/MC/ARM/arm_instructions.s index 86480292dc9..371535cc426 100644 --- a/test/MC/ARM/arm_instructions.s +++ b/test/MC/ARM/arm_instructions.s @@ -20,50 +20,6 @@ @ CHECK: encoding: [0xa0,0x0d,0xe1,0xf2] vqdmull.s32 q8, d17, d16 -@ CHECK: ldmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] -@ CHECK: ldmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] -@ CHECK: ldmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe9] -@ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8] -@ CHECK: ldmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe9] -@ CHECK: ldmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] - ldm r2, {r1,r3-r6,sp} - ldmia r2, {r1,r3-r6,sp} - ldmib r2, {r1,r3-r6,sp} - ldmda r2, {r1,r3-r6,sp} - ldmdb r2, {r1,r3-r6,sp} - ldmfd r2, {r1,r3-r6,sp} - -@ CHECK: stmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe8] -@ CHECK: stmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe8] -@ CHECK: stmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe9] -@ CHECK: stmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe8] -@ CHECK: stmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe9] -@ CHECK: stmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe9] - stm r2, {r1,r3-r6,sp} - stmia r2, {r1,r3-r6,sp} - stmib r2, {r1,r3-r6,sp} - stmda r2, {r1,r3-r6,sp} - stmdb r2, {r1,r3-r6,sp} - stmfd r2, {r1,r3-r6,sp} - -@ CHECK: ldmia r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe8] -@ CHECK: ldmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe9] -@ CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe8] -@ CHECK: ldmdb r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe9] - ldmia r2!, {r1,r3-r6,sp} - ldmib r2!, {r1,r3-r6,sp} - ldmda r2!, {r1,r3-r6,sp} - ldmdb r2!, {r1,r3-r6,sp} - -@ CHECK: stmia r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa2,0xe8] -@ CHECK: stmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa2,0xe9] -@ CHECK: stmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x22,0xe8] -@ CHECK: stmdb r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x22,0xe9] - stmia r2!, {r1,r3-r6,sp} - stmib r2!, {r1,r3-r6,sp} - stmda r2!, {r1,r3-r6,sp} - stmdb r2!, {r1,r3-r6,sp} - @ CHECK: and r1, r2, r3 @ encoding: [0x03,0x10,0x02,0xe0] and r1,r2,r3 diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index 75ddf123110..130f0b45d74 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -588,3 +588,61 @@ _func: @ CHECK: isb sy @ encoding: [0x6f,0xf0,0x7f,0xf5] @ CHECK: isb sy @ encoding: [0x6f,0xf0,0x7f,0xf5] + + + +@------------------------------------------------------------------------------ +@ LDM* +@------------------------------------------------------------------------------ + ldm r2, {r1,r3-r6,sp} + ldmia r2, {r1,r3-r6,sp} + ldmib r2, {r1,r3-r6,sp} + ldmda r2, {r1,r3-r6,sp} + ldmdb r2, {r1,r3-r6,sp} + ldmfd r2, {r1,r3-r6,sp} + + @ with update + ldm r2!, {r1,r3-r6,sp} + ldmib r2!, {r1,r3-r6,sp} + ldmda r2!, {r1,r3-r6,sp} + ldmdb r2!, {r1,r3-r6,sp} + +@ CHECK: ldm r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] +@ CHECK: ldm r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] +@ CHECK: ldmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe9] +@ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8] +@ CHECK: ldmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe9] +@ CHECK: ldm r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8] + +@ CHECK: ldm r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe8] +@ CHECK: ldmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe9] +@ CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe8] +@ CHECK: ldmdb r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe9] + + +@------------------------------------------------------------------------------ +@ STM* +@------------------------------------------------------------------------------ + stm r2, {r1,r3-r6,sp} + stmia r2, {r1,r3-r6,sp} + stmib r2, {r1,r3-r6,sp} + stmda r2, {r1,r3-r6,sp} + stmdb r2, {r1,r3-r6,sp} + stmfd r2, {r1,r3-r6,sp} + + @ with update + stmia r2!, {r1,r3-r6,sp} + stmib r2!, {r1,r3-r6,sp} + stmda r2!, {r1,r3-r6,sp} + stmdb r2!, {r1,r3-r6,sp} +@ CHECK: stm r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe8] +@ CHECK: stm r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe8] +@ CHECK: stmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe9] +@ CHECK: stmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe8] +@ CHECK: stmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe9] +@ CHECK: stmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe9] + +@ CHECK: stm r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa2,0xe8] +@ CHECK: stmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa2,0xe9] +@ CHECK: stmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x22,0xe8] +@ CHECK: stmdb r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x22,0xe9] -- 2.34.1