From 320c630c1b55e17fa00249d499f974cb1a4238f8 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Sat, 8 Dec 2007 07:17:56 +0000 Subject: [PATCH] Renaming: isTriviallyReMaterializable -> hasNoSideEffects isReallyTriviallyReMaterializable -> isTriviallyReMaterializable git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44702 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetInstrInfo.h | 24 ++++++++++++------------ lib/CodeGen/LiveIntervalAnalysis.cpp | 2 +- lib/CodeGen/MachineLICM.cpp | 2 +- lib/Target/X86/X86InstrInfo.cpp | 2 +- lib/Target/X86/X86InstrInfo.h | 2 +- 5 files changed, 16 insertions(+), 16 deletions(-) diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index a0596e47c6e..2f2f4cd575e 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -288,24 +288,24 @@ public: return get(Opcode).Flags & M_HAS_OPTIONAL_DEF; } - /// isTriviallyReMaterializable - Return true if the instruction is trivially + /// hasNoSideEffects - Return true if the instruction is trivially /// rematerializable, meaning it has no side effects and requires no operands /// that aren't always available. - bool isTriviallyReMaterializable(MachineInstr *MI) const { + bool hasNoSideEffects(MachineInstr *MI) const { return (MI->getInstrDescriptor()->Flags & M_REMATERIALIZIBLE) && - isReallyTriviallyReMaterializable(MI); + isTriviallyReMaterializable(MI); } protected: - /// isReallyTriviallyReMaterializable - For instructions with opcodes for - /// which the M_REMATERIALIZABLE flag is set, this function tests whether the - /// instruction itself is actually trivially rematerializable, considering - /// its operands. This is used for targets that have instructions that are - /// only trivially rematerializable for specific uses. This predicate must - /// return false if the instruction has any side effects other than - /// producing a value, or if it requres any address registers that are not - /// always available. - virtual bool isReallyTriviallyReMaterializable(MachineInstr *MI) const { + /// isTriviallyReMaterializable - For instructions with opcodes for which the + /// M_REMATERIALIZABLE flag is set, this function tests whether the + /// instruction itself is actually trivially rematerializable, considering its + /// operands. This is used for targets that have instructions that are only + /// trivially rematerializable for specific uses. This predicate must return + /// false if the instruction has any side effects other than producing a + /// value, or if it requres any address registers that are not always + /// available. + virtual bool isTriviallyReMaterializable(MachineInstr *MI) const { return true; } diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index d151da3a946..f4144e3900b 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -613,7 +613,7 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li, return false; isLoad = false; - if (tii_->isTriviallyReMaterializable(MI)) { + if (tii_->hasNoSideEffects(MI)) { isLoad = MI->getInstrDescriptor()->Flags & M_LOAD_FLAG; return true; } diff --git a/lib/CodeGen/MachineLICM.cpp b/lib/CodeGen/MachineLICM.cpp index 11531515dbd..0f8c01c497d 100644 --- a/lib/CodeGen/MachineLICM.cpp +++ b/lib/CodeGen/MachineLICM.cpp @@ -120,7 +120,7 @@ namespace { if (TID->ImplicitUses || !I.getNumOperands()) return false; MachineOpCode Opcode = TID->Opcode; - return TII->isTriviallyReMaterializable(&I) && + return TII->hasNoSideEffects(&I) && // FIXME: Below necessary? !(TII->isReturn(Opcode) || TII->isTerminatorInstr(Opcode) || diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 9d5e6371199..880e2fd2f84 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -116,7 +116,7 @@ unsigned X86InstrInfo::isStoreToStackSlot(MachineInstr *MI, } -bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const { +bool X86InstrInfo::isTriviallyReMaterializable(MachineInstr *MI) const { switch (MI->getOpcode()) { default: break; case X86::MOV8rm: diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 2694481caab..1e6aaf3c30f 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -239,7 +239,7 @@ public: unsigned& destReg) const; unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const; unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const; - bool isReallyTriviallyReMaterializable(MachineInstr *MI) const; + bool isTriviallyReMaterializable(MachineInstr *MI) const; /// convertToThreeAddress - This method must be implemented by targets that /// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target -- 2.34.1