From 2eb80fa433fbc9257bb7ef236e48092981cc3b3c Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 16 May 2007 21:20:37 +0000 Subject: [PATCH] Add default implementation of PredicateInstruction(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37123 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/TargetInstrInfo.cpp | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/lib/Target/TargetInstrInfo.cpp b/lib/Target/TargetInstrInfo.cpp index b9fca8a1bfd..fe5ee1d25e0 100644 --- a/lib/Target/TargetInstrInfo.cpp +++ b/lib/Target/TargetInstrInfo.cpp @@ -59,3 +59,23 @@ MachineInstr *TargetInstrInfo::commuteInstruction(MachineInstr *MI) const { MI->getOperand(1).unsetIsKill(); return MI; } + +void TargetInstrInfo::PredicateInstruction(MachineInstr *MI, + std::vector &Cond) const { + const TargetInstrDescriptor *TID = MI->getInstrDescriptor(); + assert((TID->Flags & M_PREDICABLE) && + "Predicating an unpredicable instruction!"); + + for (unsigned j = 0, i = 0, e = MI->getNumOperands(); i != e; ++i) { + if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) { + MachineOperand &MO = MI->getOperand(i); + if (MO.isReg()) + MO.setReg(Cond[j].getReg()); + else if (MO.isImm()) + MO.setImm(Cond[j].getImmedValue()); + else if (MO.isMBB()) + MO.setMachineBasicBlock(Cond[j].getMachineBasicBlock()); + ++j; + } + } +} -- 2.34.1