From 2cc97def7434345e399e4f5f3f2001d6d7a93c6f Mon Sep 17 00:00:00 2001 From: Chad Rosier Date: Mon, 3 Sep 2012 20:31:23 +0000 Subject: [PATCH] [ms-inline asm] Asm operands can map to one or more MCOperands. Therefore, add the NumMCOperands argument to the GetMCInstOperandNum() function that is set to the number of MCOperands this asm operand mapped to. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163124 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/MC/MCTargetAsmParser.h | 3 ++- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 4 ++-- .../MBlaze/AsmParser/MBlazeAsmParser.cpp | 5 +++-- lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 5 +++-- lib/Target/X86/AsmParser/X86AsmParser.cpp | 5 +++-- utils/TableGen/AsmMatcherEmitter.cpp | 22 +++++++++++++++++-- 6 files changed, 33 insertions(+), 11 deletions(-) diff --git a/include/llvm/MC/MCTargetAsmParser.h b/include/llvm/MC/MCTargetAsmParser.h index 007ab41abc9..77b3e84254e 100644 --- a/include/llvm/MC/MCTargetAsmParser.h +++ b/include/llvm/MC/MCTargetAsmParser.h @@ -113,7 +113,8 @@ public: virtual unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst, const SmallVectorImpl &Operands, - unsigned OperandNum) = 0; + unsigned OperandNum, + unsigned &NumMCOperands) = 0; }; } // End llvm namespace diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index bdb20e85347..51ba3c3b37c 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -265,8 +265,8 @@ public: unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst, const SmallVectorImpl &Operands, - unsigned OperandNum) { - return GetMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum); + unsigned OperandNum, unsigned &NumMCOperands) { + return GetMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum, NumMCOperands); } }; } // end anonymous namespace diff --git a/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp b/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp index e81943c7751..6a63f17c6ae 100644 --- a/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp +++ b/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp @@ -58,8 +58,9 @@ class MBlazeAsmParser : public MCTargetAsmParser { unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst, const SmallVectorImpl &Operands, - unsigned OperandNum) { - return GetMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum); + unsigned OperandNum, unsigned &NumMCOperands) { + return GetMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum, + NumMCOperands); } public: diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index f463b7703c7..c33c4d2ccd7 100644 --- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -40,7 +40,7 @@ class MipsAsmParser : public MCTargetAsmParser { unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst, const SmallVectorImpl &Operands, - unsigned OperandNum); + unsigned OperandNum, unsigned &NumMCOperands); public: MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser) @@ -104,11 +104,12 @@ public: unsigned MipsAsmParser:: GetMCInstOperandNum(unsigned Kind, MCInst &Inst, const SmallVectorImpl &Operands, - unsigned OperandNum) { + unsigned OperandNum, unsigned &NumMCOperands) { assert (0 && "GetMCInstOperandNum() not supported by the Mips target."); // The Mips backend doesn't currently include the matcher implementation, so // the GetMCInstOperandNumImpl() is undefined. This is a temporary // work around. + NumMCOperands = 0; return 0; } diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index 6d6e7d1eea9..baf45893f1c 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -75,8 +75,9 @@ private: unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst, const SmallVectorImpl &Operands, - unsigned OperandNum) { - return GetMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum); + unsigned OperandNum, unsigned &NumMCOperands) { + return GetMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum, + NumMCOperands); } /// isSrcOp - Returns true if operand is either (%rsi) or %ds:%(rsi) diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp index 2127c048c79..a4744bad7ea 100644 --- a/utils/TableGen/AsmMatcherEmitter.cpp +++ b/utils/TableGen/AsmMatcherEmitter.cpp @@ -1703,8 +1703,10 @@ static void emitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName, OpOS << "unsigned " << Target.getName() << ClassName << "::\n" << "GetMCInstOperandNumImpl(unsigned Kind, MCInst &Inst,\n" << " const SmallVectorImpl " - << "&Operands,\n unsigned OperandNum) {\n" + << "&Operands,\n unsigned OperandNum, unsigned " + << "&NumMCOperands) {\n" << " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n" + << " NumMCOperands = 0;\n" << " unsigned MCOperandNum = 0;\n" << " uint8_t *Converter = ConversionTable[Kind];\n" << " for (uint8_t *p = Converter; *p; p+= 2) {\n" @@ -1712,6 +1714,10 @@ static void emitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName, << " switch (*p) {\n" << " default: llvm_unreachable(\"invalid conversion entry!\");\n" << " case CVT_Reg:\n" + << " if (*(p + 1) == OperandNum) {\n" + << " NumMCOperands = 1;\n" + << " break;\n" + << " }\n" << " ++MCOperandNum;\n" << " break;\n" << " case CVT_Tied:\n" @@ -1811,6 +1817,10 @@ static void emitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName, // Add a handler for the operand number lookup. OpOS << " case " << Name << ":\n" + << " if (*(p + 1) == OperandNum) {\n" + << " NumMCOperands = " << OpInfo.MINumOperands << ";\n" + << " break;\n" + << " }\n" << " MCOperandNum += " << OpInfo.MINumOperands << ";\n" << " break;\n"; break; @@ -1848,6 +1858,10 @@ static void emitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName, << " break;\n"; OpOS << " case " << Name << ":\n" + << " if (*(p + 1) == OperandNum) {\n" + << " NumMCOperands = 1;\n" + << " break;\n" + << " }\n" << " ++MCOperandNum;\n" << " break;\n"; break; @@ -1877,6 +1891,10 @@ static void emitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName, << " break;\n"; OpOS << " case " << Name << ":\n" + << " if (*(p + 1) == OperandNum) {\n" + << " NumMCOperands = 1;\n" + << " break;\n" + << " }\n" << " ++MCOperandNum;\n" << " break;\n"; } @@ -2583,7 +2601,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) { OS << " unsigned GetMCInstOperandNumImpl(unsigned Kind, MCInst &Inst,\n " << " const " << "SmallVectorImpl &Operands,\n " - << " unsigned OperandNum);\n"; + << " unsigned OperandNum, unsigned &NumMCOperands);\n"; OS << " bool MnemonicIsValid(StringRef Mnemonic);\n"; OS << " unsigned MatchInstructionImpl(\n" << " const SmallVectorImpl &Operands,\n" -- 2.34.1