From 27253f5edd04791bfbd0b5dd6e228be1d8071fce Mon Sep 17 00:00:00 2001
From: Anton Korobeynikov <asl@math.spbu.ru>
Date: Mon, 1 Jul 2013 19:44:44 +0000
Subject: [PATCH] Add jump tables handling for MSP430. Patch by Job Noorman!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185364 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/MSP430/MSP430ISelLowering.cpp | 10 +++++
 lib/Target/MSP430/MSP430ISelLowering.h   |  1 +
 test/CodeGen/MSP430/jumptable.ll         | 54 ++++++++++++++++++++++++
 3 files changed, 65 insertions(+)
 create mode 100644 test/CodeGen/MSP430/jumptable.ll

diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp
index 3c19213a85c..168e3f1af5e 100644
--- a/lib/Target/MSP430/MSP430ISelLowering.cpp
+++ b/lib/Target/MSP430/MSP430ISelLowering.cpp
@@ -169,6 +169,7 @@ MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) :
   setOperationAction(ISD::VAARG,            MVT::Other, Expand);
   setOperationAction(ISD::VAEND,            MVT::Other, Expand);
   setOperationAction(ISD::VACOPY,           MVT::Other, Expand);
+  setOperationAction(ISD::JumpTable,        MVT::i16,   Custom);
 
   // Libcalls names.
   if (HWMultMode == HWMultIntr) {
@@ -199,6 +200,7 @@ SDValue MSP430TargetLowering::LowerOperation(SDValue Op,
   case ISD::RETURNADDR:       return LowerRETURNADDR(Op, DAG);
   case ISD::FRAMEADDR:        return LowerFRAMEADDR(Op, DAG);
   case ISD::VASTART:          return LowerVASTART(Op, DAG);
+  case ISD::JumpTable:        return LowerJumpTable(Op, DAG);
   default:
     llvm_unreachable("unimplemented operand");
   }
@@ -981,6 +983,14 @@ SDValue MSP430TargetLowering::LowerVASTART(SDValue Op,
                       false, false, 0);
 }
 
+SDValue MSP430TargetLowering::LowerJumpTable(SDValue Op,
+                                             SelectionDAG &DAG) const {
+    JumpTableSDNode *JT = cast<JumpTableSDNode>(Op);
+    SDValue Result = DAG.getTargetJumpTable(JT->getIndex(), getPointerTy());
+    Result.getNode()->setDebugLoc(JT->getDebugLoc());
+    return Result;
+}
+
 /// getPostIndexedAddressParts - returns true by value, base pointer and
 /// offset pointer and addressing mode by reference if this node can be
 /// combined with a load / store to form a post-indexed load / store.
diff --git a/lib/Target/MSP430/MSP430ISelLowering.h b/lib/Target/MSP430/MSP430ISelLowering.h
index 878b2076bf5..85a861ebecb 100644
--- a/lib/Target/MSP430/MSP430ISelLowering.h
+++ b/lib/Target/MSP430/MSP430ISelLowering.h
@@ -93,6 +93,7 @@ namespace llvm {
     SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
     SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
+    SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
     SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
 
     TargetLowering::ConstraintType
diff --git a/test/CodeGen/MSP430/jumptable.ll b/test/CodeGen/MSP430/jumptable.ll
new file mode 100644
index 00000000000..7e924209679
--- /dev/null
+++ b/test/CodeGen/MSP430/jumptable.ll
@@ -0,0 +1,54 @@
+; RUN: llc -O0 < %s | FileCheck %s
+
+target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
+target triple = "msp430---elf"
+
+; Function Attrs: nounwind
+define i16 @test(i16 %i) #0 {
+entry:
+; CHECK: test:
+  %retval = alloca i16, align 2
+  %i.addr = alloca i16, align 2
+  store i16 %i, i16* %i.addr, align 2
+  %0 = load i16* %i.addr, align 2
+; CHECK: add.w #.LJTI0_0, [[REG1:r[0-9]+]]
+; CHECK: mov.w 0([[REG1]]), [[REG2:r[0-9]+]]
+; CHECK: br [[REG2]]
+  switch i16 %0, label %sw.default [
+    i16 0, label %sw.bb
+    i16 1, label %sw.bb1
+    i16 2, label %sw.bb2
+    i16 3, label %sw.bb3
+  ]
+
+sw.bb:                                            ; preds = %entry
+  store i16 0, i16* %retval
+  br label %return
+
+sw.bb1:                                           ; preds = %entry
+  store i16 1, i16* %retval
+  br label %return
+
+sw.bb2:                                           ; preds = %entry
+  store i16 2, i16* %retval
+  br label %return
+
+sw.bb3:                                           ; preds = %entry
+  store i16 3, i16* %retval
+  br label %return
+
+sw.default:                                       ; preds = %entry
+  store i16 2, i16* %retval
+  br label %return
+
+return:                                           ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb
+  %1 = load i16* %retval
+  ret i16 %1
+; CHECK: ret
+}
+
+; CHECK: .LJTI0_0:
+; CHECK-NEXT: .short .LBB0_2
+; CHECK-NEXT: .short .LBB0_3
+; CHECK-NEXT: .short .LBB0_4
+; CHECK-NEXT: .short .LBB0_5
-- 
2.34.1