From 21c34931e8385c805d0a810b28ff1f3b9db08b77 Mon Sep 17 00:00:00 2001 From: Daniel Jasper Date: Fri, 6 Dec 2013 08:58:22 +0000 Subject: [PATCH] Fix bug introduced in r196517. Not only does it trigger -Wparentheses, I think the assert actually relies on incorrect operator precedence. Also, the grammar as questionable, but I might not know enough about the problem at hand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196567 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineScheduler.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/CodeGen/MachineScheduler.cpp b/lib/CodeGen/MachineScheduler.cpp index 6cfedcbbc2e..15035967be3 100644 --- a/lib/CodeGen/MachineScheduler.cpp +++ b/lib/CodeGen/MachineScheduler.cpp @@ -2175,8 +2175,9 @@ void GenericScheduler::SchedBoundary::bumpNode(SUnit *SU) { // exceed the issue width. const MCSchedClassDesc *SC = DAG->getSchedClass(SU); unsigned IncMOps = SchedModel->getNumMicroOps(SU->getInstr()); - assert(CurrMOps == 0 || (CurrMOps + IncMOps) <= SchedModel->getIssueWidth() && - "Cannot scheduling this instructions MicroOps in the current cycle."); + assert( + (CurrMOps == 0 || (CurrMOps + IncMOps) <= SchedModel->getIssueWidth()) && + "Cannot schedule this instructions MicroOps in the current cycle."); unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle); DEBUG(dbgs() << " Ready @" << ReadyCycle << "c\n"); -- 2.34.1