From 20c568f366be211323eeaf0e45ef053278ec9ddc Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Tue, 30 Jun 2009 22:38:32 +0000 Subject: [PATCH] Add an "alignment" field to the MachineFunction object. It makes more sense to have the alignment be calculated up front, and have the back-ends obey whatever alignment is decided upon. This allows for future work that would allow for precise no-op placement and the like. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74564 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/MachineFunction.h | 11 +++++++++++ include/llvm/Target/TargetLowering.h | 3 +++ lib/CodeGen/MachineFunction.cpp | 10 ++++++---- lib/Target/ARM/ARMISelLowering.cpp | 5 +++++ lib/Target/ARM/ARMISelLowering.h | 3 +++ lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp | 7 ++++--- lib/Target/Alpha/AlphaISelLowering.cpp | 5 +++++ lib/Target/Alpha/AlphaISelLowering.h | 3 +++ lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp | 2 +- lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp | 2 +- lib/Target/CellSPU/SPUISelLowering.cpp | 5 +++++ lib/Target/CellSPU/SPUISelLowering.h | 3 +++ lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp | 2 +- lib/Target/IA64/IA64ISelLowering.cpp | 5 +++++ lib/Target/IA64/IA64ISelLowering.h | 2 ++ lib/Target/MSP430/MSP430AsmPrinter.cpp | 5 +---- lib/Target/MSP430/MSP430ISelLowering.cpp | 5 +++++ lib/Target/MSP430/MSP430ISelLowering.h | 3 +++ lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp | 2 +- lib/Target/Mips/MipsISelLowering.cpp | 5 ++++- lib/Target/Mips/MipsISelLowering.h | 2 ++ lib/Target/PIC16/PIC16ISelLowering.h | 5 +++++ lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp | 4 ++-- lib/Target/PowerPC/PPCISelLowering.cpp | 8 +++++++- lib/Target/PowerPC/PPCISelLowering.h | 3 +++ lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp | 2 +- lib/Target/Sparc/SparcISelLowering.cpp | 5 +++++ lib/Target/Sparc/SparcISelLowering.h | 3 +++ lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp | 10 +--------- lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp | 5 +---- lib/Target/X86/X86ISelLowering.cpp | 5 +++++ lib/Target/X86/X86ISelLowering.h | 7 +++++-- lib/Target/XCore/XCoreAsmPrinter.cpp | 2 +- lib/Target/XCore/XCoreISelLowering.cpp | 6 ++++++ lib/Target/XCore/XCoreISelLowering.h | 3 +++ 35 files changed, 122 insertions(+), 36 deletions(-) diff --git a/include/llvm/CodeGen/MachineFunction.h b/include/llvm/CodeGen/MachineFunction.h index 0074f1a5f2c..e9cecf9d682 100644 --- a/include/llvm/CodeGen/MachineFunction.h +++ b/include/llvm/CodeGen/MachineFunction.h @@ -111,6 +111,9 @@ class MachineFunction : private Annotation { // Tracks debug locations. DebugLocTracker DebugLocInfo; + // The alignment of the function. + unsigned Alignment; + public: MachineFunction(const Function *Fn, const TargetMachine &TM); ~MachineFunction(); @@ -148,6 +151,14 @@ public: MachineConstantPool *getConstantPool() { return ConstantPool; } const MachineConstantPool *getConstantPool() const { return ConstantPool; } + /// getAlignment - Return the alignment of the function. + /// + unsigned getAlignment() const { return Alignment; } + + /// setAlignment - Set the alignment of the function. + /// + void setAlignment(unsigned A) { Alignment = A; } + /// MachineFunctionInfo - Keep track of various per-function pieces of /// information for backends that would like to do so. /// diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 02451c2b459..e52880fe956 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -736,6 +736,9 @@ public: /// PIC relocation models. virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + /// getFunctionAlignment - Return the alignment of this function. + virtual unsigned getFunctionAlignment(const Function *) const = 0; + //===--------------------------------------------------------------------===// // TargetLowering Optimization Methods // diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp index 2d2b59e2ece..599efb8bd27 100644 --- a/lib/CodeGen/MachineFunction.cpp +++ b/lib/CodeGen/MachineFunction.cpp @@ -14,6 +14,10 @@ //===----------------------------------------------------------------------===// #include "llvm/DerivedTypes.h" +#include "llvm/Function.h" +#include "llvm/Instructions.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/Config/config.h" #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineFrameInfo.h" @@ -22,15 +26,12 @@ #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetData.h" +#include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetFrameInfo.h" -#include "llvm/Function.h" -#include "llvm/Instructions.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/GraphWriter.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/ADT/STLExtras.h" -#include "llvm/Config/config.h" #include #include using namespace llvm; @@ -124,6 +125,7 @@ MachineFunction::MachineFunction(const Function *F, MachineFrameInfo(*TM.getFrameInfo()); ConstantPool = new (Allocator.Allocate()) MachineConstantPool(TM.getTargetData()); + Alignment = TM.getTargetLowering()->getFunctionAlignment(F); // Set up jump table. const TargetData &TD = *TM.getTargetData(); diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index bf0a56b55bc..d5a677a550a 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -455,6 +455,11 @@ const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const { } } +/// getFunctionAlignment - Return the alignment of this function. +unsigned ARMTargetLowering::getFunctionAlignment(const Function *F) const { + return getTargetMachine().getSubtarget().isThumb() ? 1 : 2; +} + //===----------------------------------------------------------------------===// // Lowering Code //===----------------------------------------------------------------------===// diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h index c4920e6c99a..a546b822013 100644 --- a/lib/Target/ARM/ARMISelLowering.h +++ b/lib/Target/ARM/ARMISelLowering.h @@ -197,6 +197,9 @@ namespace llvm { return Subtarget; } + /// getFunctionAlignment - Return the alignment of this function. + virtual unsigned getFunctionAlignment(const Function *F) const; + private: /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can /// make the right decision when generating code for different targets. diff --git a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp index 45c6727c72a..bd824792949 100644 --- a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp @@ -235,15 +235,16 @@ bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) { printVisibility(CurrentFnName, F->getVisibility()); if (AFI->isThumbFunction()) { - EmitAlignment(1, F, AFI->getAlign()); + EmitAlignment(MF.getAlignment(), F, AFI->getAlign()); O << "\t.code\t16\n"; O << "\t.thumb_func"; if (Subtarget->isTargetDarwin()) O << "\t" << CurrentFnName; O << "\n"; InCPMode = false; - } else - EmitAlignment(2, F); + } else { + EmitAlignment(MF.getAlignment(), F); + } O << CurrentFnName << ":\n"; // Emit pre-function debug information. diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp index 1be17135357..b70c2aca578 100644 --- a/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/lib/Target/Alpha/AlphaISelLowering.cpp @@ -181,6 +181,11 @@ const char *AlphaTargetLowering::getTargetNodeName(unsigned Opcode) const { } } +/// getFunctionAlignment - Return the function alignment. +unsigned AlphaTargetLowering::getFunctionAlignment(const Function *F) const { + return 4; +} + static SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) { MVT PtrVT = Op.getValueType(); JumpTableSDNode *JT = cast(Op); diff --git a/lib/Target/Alpha/AlphaISelLowering.h b/lib/Target/Alpha/AlphaISelLowering.h index fdd817c7648..1d6fad6bfa5 100644 --- a/lib/Target/Alpha/AlphaISelLowering.h +++ b/lib/Target/Alpha/AlphaISelLowering.h @@ -103,6 +103,9 @@ namespace llvm { virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *F) const; + private: // Helpers for custom lowering. void LowerVAARG(SDNode *N, SDValue &Chain, SDValue &DataPtr, diff --git a/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp index e0c0a647f1d..06232712da4 100644 --- a/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp +++ b/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp @@ -155,7 +155,7 @@ bool AlphaAsmPrinter::runOnMachineFunction(MachineFunction &MF) { const Function *F = MF.getFunction(); SwitchToSection(TAI->SectionForGlobal(F)); - EmitAlignment(4, F); + EmitAlignment(MF.getAlignment(), F); switch (F->getLinkage()) { default: assert(0 && "Unknown linkage type!"); case Function::InternalLinkage: // Symbols default to internal. diff --git a/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp b/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp index 02b625b18dd..92edb447459 100644 --- a/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp +++ b/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp @@ -433,7 +433,7 @@ LinuxAsmPrinter::runOnMachineFunction(MachineFunction &MF) const Function *F = MF.getFunction(); SwitchToSection(TAI->SectionForGlobal(F)); - EmitAlignment(3, F); + EmitAlignment(MF.getAlignment(), F); switch (F->getLinkage()) { default: assert(0 && "Unknown linkage type!"); diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp index b28644378bd..f16d7d88959 100644 --- a/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/lib/Target/CellSPU/SPUISelLowering.cpp @@ -481,6 +481,11 @@ SPUTargetLowering::getTargetNodeName(unsigned Opcode) const return ((i != node_names.end()) ? i->second : 0); } +/// getFunctionAlignment - Return the function alignment. +unsigned SPUTargetLowering::getFunctionAlignment(const Function *) const { + return 3; +} + //===----------------------------------------------------------------------===// // Return the Cell SPU's SETCC result type //===----------------------------------------------------------------------===// diff --git a/lib/Target/CellSPU/SPUISelLowering.h b/lib/Target/CellSPU/SPUISelLowering.h index 866c632d527..09c3d78a555 100644 --- a/lib/Target/CellSPU/SPUISelLowering.h +++ b/lib/Target/CellSPU/SPUISelLowering.h @@ -148,6 +148,9 @@ namespace llvm { virtual bool isLegalAddressImmediate(GlobalValue *) const; virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *F) const; }; } diff --git a/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp b/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp index 6b34a4efd08..9c929d50e9e 100644 --- a/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp +++ b/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp @@ -137,7 +137,7 @@ bool IA64AsmPrinter::runOnMachineFunction(MachineFunction &MF) { SwitchToSection(TAI->SectionForGlobal(F)); // Print out labels for the function. - EmitAlignment(5); + EmitAlignment(MF.getAlignment()); O << "\t.global\t" << CurrentFnName << '\n'; printVisibility(CurrentFnName, F->getVisibility()); diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp index c545b9c0eb1..0142a559132 100644 --- a/lib/Target/IA64/IA64ISelLowering.cpp +++ b/lib/Target/IA64/IA64ISelLowering.cpp @@ -148,6 +148,11 @@ MVT IA64TargetLowering::getSetCCResultType(MVT VT) const { return MVT::i1; } +/// getFunctionAlignment - Return the function alignment. +unsigned IA64TargetLowering::getFunctionAlignment(const Function *) const { + return 5; +} + void IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG, SmallVectorImpl &ArgValues, DebugLoc dl) { diff --git a/lib/Target/IA64/IA64ISelLowering.h b/lib/Target/IA64/IA64ISelLowering.h index edf7eb895ad..e586f7449b7 100644 --- a/lib/Target/IA64/IA64ISelLowering.h +++ b/lib/Target/IA64/IA64ISelLowering.h @@ -70,6 +70,8 @@ namespace llvm { /// (currently, only "ret void") virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG); + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *F) const; }; } diff --git a/lib/Target/MSP430/MSP430AsmPrinter.cpp b/lib/Target/MSP430/MSP430AsmPrinter.cpp index 71b785bb4fe..bfdb058c94d 100644 --- a/lib/Target/MSP430/MSP430AsmPrinter.cpp +++ b/lib/Target/MSP430/MSP430AsmPrinter.cpp @@ -97,10 +97,7 @@ void MSP430AsmPrinter::emitFunctionHeader(const MachineFunction &MF) { SwitchToSection(TAI->SectionForGlobal(F)); - unsigned FnAlign = 4; - if (F->hasFnAttr(Attribute::OptimizeForSize)) - FnAlign = 1; - + unsigned FnAlign = MF.getAlignment(); EmitAlignment(FnAlign, F); switch (F->getLinkage()) { diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp index 14db20e5fcd..d57ae82f3fe 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -127,6 +127,11 @@ SDValue MSP430TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) { } } +/// getFunctionAlignment - Return the alignment of this function. +unsigned MSP430TargetLowering::getFunctionAlignment(const Function *F) const { + return F->hasFnAttr(Attribute::OptimizeForSize) ? 1 : 4; +} + //===----------------------------------------------------------------------===// // Calling Convention Implementation //===----------------------------------------------------------------------===// diff --git a/lib/Target/MSP430/MSP430ISelLowering.h b/lib/Target/MSP430/MSP430ISelLowering.h index 404534dde89..fcbec59c871 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.h +++ b/lib/Target/MSP430/MSP430ISelLowering.h @@ -74,6 +74,9 @@ namespace llvm { /// DAG node. virtual const char *getTargetNodeName(unsigned Opcode) const; + /// getFunctionAlignment - Return the alignment of this function. + virtual unsigned getFunctionAlignment(const Function *F) const; + SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); SDValue LowerRET(SDValue Op, SelectionDAG &DAG); diff --git a/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp b/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp index 431630b1465..dad60505530 100644 --- a/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp +++ b/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp @@ -230,7 +230,7 @@ emitFunctionStart(MachineFunction &MF) SwitchToSection(TAI->SectionForGlobal(F)); // 2 bits aligned - EmitAlignment(2, F); + EmitAlignment(MF.getAlignment(), F); O << "\t.globl\t" << CurrentFnName << '\n'; O << "\t.ent\t" << CurrentFnName << '\n'; diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 42afcebabec..7d01fa2e212 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -154,11 +154,14 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM) computeRegisterProperties(); } - MVT MipsTargetLowering::getSetCCResultType(MVT VT) const { return MVT::i32; } +/// getFunctionAlignment - Return the function alignment. +unsigned MipsTargetLowering::getFunctionAlignment(const Function *) const { + return 2; +} SDValue MipsTargetLowering:: LowerOperation(SDValue Op, SelectionDAG &DAG) diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h index 55cd6eadd09..daef0ad6077 100644 --- a/lib/Target/Mips/MipsISelLowering.h +++ b/lib/Target/Mips/MipsISelLowering.h @@ -84,6 +84,8 @@ namespace llvm { /// getSetCCResultType - get the ISD::SETCC result ValueType MVT getSetCCResultType(MVT VT) const; + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *F) const; private: // Subtarget Info const MipsSubtarget *Subtarget; diff --git a/lib/Target/PIC16/PIC16ISelLowering.h b/lib/Target/PIC16/PIC16ISelLowering.h index ca9650d6b19..d5008c30078 100644 --- a/lib/Target/PIC16/PIC16ISelLowering.h +++ b/lib/Target/PIC16/PIC16ISelLowering.h @@ -145,6 +145,11 @@ namespace llvm { unsigned GetTmpSize() { return TmpSize; } void SetTmpSize(unsigned Size) { TmpSize = Size; } + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *) const { + // FIXME: The function never seems to be aligned. + return 1; + } private: // If the Node is a BUILD_PAIR representing a direct Address, // then this function will return true. diff --git a/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp b/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp index c5aa6aef7d7..457931b6914 100644 --- a/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp +++ b/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp @@ -596,7 +596,7 @@ bool PPCLinuxAsmPrinter::runOnMachineFunction(MachineFunction &MF) { printVisibility(CurrentFnName, F->getVisibility()); - EmitAlignment(2, F); + EmitAlignment(MF.getAlignment(), F); O << CurrentFnName << ":\n"; // Emit pre-function debug information. @@ -773,7 +773,7 @@ bool PPCDarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) { printVisibility(CurrentFnName, F->getVisibility()); - EmitAlignment(F->hasFnAttr(Attribute::OptimizeForSize) ? 2 : 4, F); + EmitAlignment(MF.getAlignment(), F); O << CurrentFnName << ":\n"; // Emit pre-function debug information. diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 87f8fb0b4e0..cf17599e29a 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -428,11 +428,17 @@ const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const { } } - MVT PPCTargetLowering::getSetCCResultType(MVT VT) const { return MVT::i32; } +/// getFunctionAlignment - Return the function alignment. +unsigned PPCTargetLowering::getFunctionAlignment(const Function *F) const { + if (getTargetMachine().getSubtarget().isDarwin()) + return F->hasFnAttr(Attribute::OptimizeForSize) ? 2 : 4; + else + return 2; +} //===----------------------------------------------------------------------===// // Node matching predicates, for use by the tblgen matching code. diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index b6d046f2dd5..d7dd75d1d13 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -337,6 +337,9 @@ namespace llvm { virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *F) const; + private: SDValue getFramePointerFrameIndex(SelectionDAG & DAG) const; SDValue getReturnAddrFrameIndex(SelectionDAG & DAG) const; diff --git a/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp b/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp index cb23f6212ca..26fbb1c8717 100644 --- a/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp +++ b/lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp @@ -109,7 +109,7 @@ bool SparcAsmPrinter::runOnMachineFunction(MachineFunction &MF) { // Print out the label for the function. const Function *F = MF.getFunction(); SwitchToSection(TAI->SectionForGlobal(F)); - EmitAlignment(4, F); + EmitAlignment(MF.getAlignment(), F); O << "\t.globl\t" << CurrentFnName << '\n'; printVisibility(CurrentFnName, F->getVisibility()); diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp index 3ec7e06f098..70096490d35 100644 --- a/lib/Target/Sparc/SparcISelLowering.cpp +++ b/lib/Target/Sparc/SparcISelLowering.cpp @@ -1047,3 +1047,8 @@ SparcTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const { // The Sparc target isn't yet aware of offsets. return false; } + +/// getFunctionAlignment - Return the function alignment. +unsigned SparcTargetLowering::getFunctionAlignment(const Function *) const { + return 4; +} diff --git a/lib/Target/Sparc/SparcISelLowering.h b/lib/Target/Sparc/SparcISelLowering.h index fe6811f8c37..0aa5dbbf9c2 100644 --- a/lib/Target/Sparc/SparcISelLowering.h +++ b/lib/Target/Sparc/SparcISelLowering.h @@ -73,6 +73,9 @@ namespace llvm { MVT VT) const; virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; + + /// getFunctionAlignment - Return the function alignment. + virtual unsigned getFunctionAlignment(const Function *F) const; }; } // end namespace llvm diff --git a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp index e75cfc5c309..127f228263f 100644 --- a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp +++ b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp @@ -154,21 +154,13 @@ void X86ATTAsmPrinter::decorateName(std::string &Name, } } - - void X86ATTAsmPrinter::emitFunctionHeader(const MachineFunction &MF) { + unsigned FnAlign = MF.getAlignment(); const Function *F = MF.getFunction(); decorateName(CurrentFnName, F); SwitchToSection(TAI->SectionForGlobal(F)); - - // FIXME: A function's alignment should be part of MachineFunction. There - // shouldn't be a policy decision here. - unsigned FnAlign = 4; - if (F->hasFnAttr(Attribute::OptimizeForSize)) - FnAlign = 1; - switch (F->getLinkage()) { default: assert(0 && "Unknown linkage type!"); case Function::InternalLinkage: // Symbols default to internal. diff --git a/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp b/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp index ceae7bebc23..9d4df93c1b4 100644 --- a/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp +++ b/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp @@ -132,6 +132,7 @@ bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) { // Print out labels for the function. const Function *F = MF.getFunction(); unsigned CC = F->getCallingConv(); + unsigned FnAlign = MF.getAlignment(); // Populate function information map. Actually, We don't want to populate // non-stdcall or non-fastcall functions' information right now. @@ -141,10 +142,6 @@ bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) { decorateName(CurrentFnName, F); SwitchToTextSection("_text", F); - - unsigned FnAlign = 4; - if (F->hasFnAttr(Attribute::OptimizeForSize)) - FnAlign = 1; switch (F->getLinkage()) { default: assert(0 && "Unsupported linkage type!"); case Function::PrivateLinkage: diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 0adb10dd034..64ba5b66c63 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1027,6 +1027,11 @@ SDValue X86TargetLowering::getPICJumpTableRelocBase(SDValue Table, return Table; } +/// getFunctionAlignment - Return the alignment of this function. +unsigned X86TargetLowering::getFunctionAlignment(const Function *F) const { + return F->hasFnAttr(Attribute::OptimizeForSize) ? 1 : 4; +} + //===----------------------------------------------------------------------===// // Return Value Calling Convention Implementation //===----------------------------------------------------------------------===// diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h index fb4eb6815b2..00d1784aae5 100644 --- a/lib/Target/X86/X86ISelLowering.h +++ b/lib/Target/X86/X86ISelLowering.h @@ -380,7 +380,7 @@ namespace llvm { MVT getOptimalMemOpType(uint64_t Size, unsigned Align, bool isSrcConst, bool isSrcStr, SelectionDAG &DAG) const; - + /// LowerOperation - Provide custom lowering hooks for some operations. /// virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG); @@ -533,7 +533,10 @@ namespace llvm { , SmallSet & #endif ); - + + /// getFunctionAlignment - Return the alignment of this function. + virtual unsigned getFunctionAlignment(const Function *F) const; + private: /// Subtarget - Keep a pointer to the X86Subtarget around so that we can /// make the right decision when generating code for different targets. diff --git a/lib/Target/XCore/XCoreAsmPrinter.cpp b/lib/Target/XCore/XCoreAsmPrinter.cpp index 4ab5d75e5b7..8b6a7223c35 100644 --- a/lib/Target/XCore/XCoreAsmPrinter.cpp +++ b/lib/Target/XCore/XCoreAsmPrinter.cpp @@ -277,7 +277,7 @@ emitFunctionStart(MachineFunction &MF) break; } // (1 << 1) byte aligned - EmitAlignment(1, F, 1); + EmitAlignment(MF.getAlignment(), F, 1); if (TAI->hasDotTypeDotSizeDirective()) { O << "\t.type " << CurrentFnName << ",@function\n"; } diff --git a/lib/Target/XCore/XCoreISelLowering.cpp b/lib/Target/XCore/XCoreISelLowering.cpp index 93c5f59f642..0b65ceee60a 100644 --- a/lib/Target/XCore/XCoreISelLowering.cpp +++ b/lib/Target/XCore/XCoreISelLowering.cpp @@ -187,6 +187,12 @@ void XCoreTargetLowering::ReplaceNodeResults(SDNode *N, } } +/// getFunctionAlignment - Return the alignment of this function. +unsigned XCoreTargetLowering:: +getFunctionAlignment(const Function *) const { + return 1; +} + //===----------------------------------------------------------------------===// // Misc Lower Operation implementation //===----------------------------------------------------------------------===// diff --git a/lib/Target/XCore/XCoreISelLowering.h b/lib/Target/XCore/XCoreISelLowering.h index 993ecbdc60a..4f962fa2b4a 100644 --- a/lib/Target/XCore/XCoreISelLowering.h +++ b/lib/Target/XCore/XCoreISelLowering.h @@ -84,6 +84,9 @@ namespace llvm { virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty) const; + /// getFunctionAlignment - Return the alignment of this function. + virtual unsigned getFunctionAlignment(const Function *F) const; + private: const XCoreTargetMachine &TM; const XCoreSubtarget &Subtarget; -- 2.34.1