From 1a33e6eb7477ecc015f3aadbd47f1c1434003a66 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Tue, 22 Oct 2002 00:15:13 +0000
Subject: [PATCH] Small space optimization: Make MachineOperands take 16 bytes
 instead of 20 on intel or 24 on sparc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4256 91177308-0d34-0410-b5e6-96231b3b80d8
---
 include/llvm/CodeGen/MachineInstr.h | 21 ++++++---------------
 1 file changed, 6 insertions(+), 15 deletions(-)

diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 54ea96d5558..2142447f6c9 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -72,8 +72,6 @@ private:
   static const char LOFLAG64   = 0x20; // operand is %lo64(value_or_immedVal)
   
 private:
-  MachineOperandType opType;
-  
   union {
     Value*	value;		// BasicBlockVal for a label operand.
 				// ConstantVal for a non-address immediate.
@@ -83,10 +81,10 @@ private:
     int64_t immedVal;		// constant value for an explicit constant
   };
 
+  MachineOperandType opType:8;  // Pack into 8 bits efficiently after flags.
+  char flags;                   // see bit field definitions above
   int regNum;	                // register number for an explicit register
                                 // will be set for a value after reg allocation
-  char flags;                   // see bit field definitions above
-  
 public:
   /*ctor*/		MachineOperand	();
   /*ctor*/		MachineOperand	(MachineOperandType operandType,
@@ -189,25 +187,18 @@ private:
 
 inline
 MachineOperand::MachineOperand()
-  : opType(MO_VirtualRegister),
-    immedVal(0),
-    regNum(-1),
-    flags(0)
+  : immedVal(0), opType(MO_VirtualRegister), flags(0), regNum(-1)
 {}
 
 inline
 MachineOperand::MachineOperand(MachineOperandType operandType,
 			       Value* _val)
-  : opType(operandType),
-    immedVal(0),
-    regNum(-1),
-    flags(0)
+  : immedVal(0), opType(operandType), flags(0), regNum(-1)
 {}
 
 inline
 MachineOperand::MachineOperand(const MachineOperand& mo)
-  : opType(mo.opType),
-    flags(mo.flags)
+  : opType(mo.opType), flags(mo.flags)
 {
   switch(opType) {
   case MO_VirtualRegister:
@@ -276,7 +267,7 @@ MachineOperand::InitializeReg(int _regNum, bool isCCReg)
 //      a CALL (if any), and return value of a RETURN.
 //---------------------------------------------------------------------------
 
-class MachineInstr :  public Annotable,         // Values are annotable
+class MachineInstr :  public Annotable,         // MachineInstrs are annotable
                       public NonCopyable {      // Disable copy operations
   MachineOpCode    opCode;              // the opcode
   OpCodeMask       opCodeMask;          // extra bits for variants of an opcode
-- 
2.34.1