From 1800766f5aa2ff283dc2575fdd00c2a1750f9d02 Mon Sep 17 00:00:00 2001 From: Nico Rieck Date: Sun, 16 Feb 2014 13:28:39 +0000 Subject: [PATCH] Fix more broken CHECK lines git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201493 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/ARM/fp16.ll | 2 +- test/CodeGen/Mips/msa/vec.ll | 144 +++++++++--------- .../R600/32-bit-local-address-space.ll | 4 +- 3 files changed, 75 insertions(+), 75 deletions(-) diff --git a/test/CodeGen/ARM/fp16.ll b/test/CodeGen/ARM/fp16.ll index a5c1aed277b..fba794676d4 100644 --- a/test/CodeGen/ARM/fp16.ll +++ b/test/CodeGen/ARM/fp16.ll @@ -9,7 +9,7 @@ target triple = "armv7-eabi" define arm_aapcs_vfpcc void @foo() nounwind { ; CHECK-LABEL: foo: -; CHECK-FP6-LABEL: foo: +; CHECK-FP16-LABEL: foo: entry: %0 = load i16* @x, align 2 %1 = load i16* @y, align 2 diff --git a/test/CodeGen/Mips/msa/vec.ll b/test/CodeGen/Mips/msa/vec.ll index 5bddf5aea40..3916c69498f 100644 --- a/test/CodeGen/Mips/msa/vec.ll +++ b/test/CodeGen/Mips/msa/vec.ll @@ -104,12 +104,12 @@ entry: ret void } -; CHECK: and_v_b_test: -; CHECK: ld.b -; CHECK: ld.b -; CHECK: and.v -; CHECK: st.b -; CHECK: .size and_v_b_test +; ANYENDIAN: and_v_b_test: +; ANYENDIAN: ld.b +; ANYENDIAN: ld.b +; ANYENDIAN: and.v +; ANYENDIAN: st.b +; ANYENDIAN: .size and_v_b_test ; define void @and_v_h_test() nounwind { entry: @@ -120,12 +120,12 @@ entry: ret void } -; CHECK: and_v_h_test: -; CHECK: ld.h -; CHECK: ld.h -; CHECK: and.v -; CHECK: st.h -; CHECK: .size and_v_h_test +; ANYENDIAN: and_v_h_test: +; ANYENDIAN: ld.h +; ANYENDIAN: ld.h +; ANYENDIAN: and.v +; ANYENDIAN: st.h +; ANYENDIAN: .size and_v_h_test ; define void @and_v_w_test() nounwind { @@ -137,12 +137,12 @@ entry: ret void } -; CHECK: and_v_w_test: -; CHECK: ld.w -; CHECK: ld.w -; CHECK: and.v -; CHECK: st.w -; CHECK: .size and_v_w_test +; ANYENDIAN: and_v_w_test: +; ANYENDIAN: ld.w +; ANYENDIAN: ld.w +; ANYENDIAN: and.v +; ANYENDIAN: st.w +; ANYENDIAN: .size and_v_w_test ; define void @and_v_d_test() nounwind { @@ -154,12 +154,12 @@ entry: ret void } -; CHECK: and_v_d_test: -; CHECK: ld.d -; CHECK: ld.d -; CHECK: and.v -; CHECK: st.d -; CHECK: .size and_v_d_test +; ANYENDIAN: and_v_d_test: +; ANYENDIAN: ld.d +; ANYENDIAN: ld.d +; ANYENDIAN: and.v +; ANYENDIAN: st.d +; ANYENDIAN: .size and_v_d_test ; @llvm_mips_bmnz_v_b_ARG1 = global <16 x i8> , align 16 @llvm_mips_bmnz_v_b_ARG2 = global <16 x i8> , align 16 @@ -722,12 +722,12 @@ entry: ret void } -; CHECK: or_v_b_test: -; CHECK: ld.b -; CHECK: ld.b -; CHECK: or.v -; CHECK: st.b -; CHECK: .size or_v_b_test +; ANYENDIAN: or_v_b_test: +; ANYENDIAN: ld.b +; ANYENDIAN: ld.b +; ANYENDIAN: or.v +; ANYENDIAN: st.b +; ANYENDIAN: .size or_v_b_test ; define void @or_v_h_test() nounwind { entry: @@ -738,12 +738,12 @@ entry: ret void } -; CHECK: or_v_h_test: -; CHECK: ld.h -; CHECK: ld.h -; CHECK: or.v -; CHECK: st.h -; CHECK: .size or_v_h_test +; ANYENDIAN: or_v_h_test: +; ANYENDIAN: ld.h +; ANYENDIAN: ld.h +; ANYENDIAN: or.v +; ANYENDIAN: st.h +; ANYENDIAN: .size or_v_h_test ; define void @or_v_w_test() nounwind { @@ -755,12 +755,12 @@ entry: ret void } -; CHECK: or_v_w_test: -; CHECK: ld.w -; CHECK: ld.w -; CHECK: or.v -; CHECK: st.w -; CHECK: .size or_v_w_test +; ANYENDIAN: or_v_w_test: +; ANYENDIAN: ld.w +; ANYENDIAN: ld.w +; ANYENDIAN: or.v +; ANYENDIAN: st.w +; ANYENDIAN: .size or_v_w_test ; define void @or_v_d_test() nounwind { @@ -772,12 +772,12 @@ entry: ret void } -; CHECK: or_v_d_test: -; CHECK: ld.d -; CHECK: ld.d -; CHECK: or.v -; CHECK: st.d -; CHECK: .size or_v_d_test +; ANYENDIAN: or_v_d_test: +; ANYENDIAN: ld.d +; ANYENDIAN: ld.d +; ANYENDIAN: or.v +; ANYENDIAN: st.d +; ANYENDIAN: .size or_v_d_test ; @llvm_mips_xor_v_b_ARG1 = global <16 x i8> , align 16 @llvm_mips_xor_v_b_ARG2 = global <16 x i8> , align 16 @@ -880,12 +880,12 @@ entry: ret void } -; CHECK: xor_v_b_test: -; CHECK: ld.b -; CHECK: ld.b -; CHECK: xor.v -; CHECK: st.b -; CHECK: .size xor_v_b_test +; ANYENDIAN: xor_v_b_test: +; ANYENDIAN: ld.b +; ANYENDIAN: ld.b +; ANYENDIAN: xor.v +; ANYENDIAN: st.b +; ANYENDIAN: .size xor_v_b_test ; define void @xor_v_h_test() nounwind { entry: @@ -896,12 +896,12 @@ entry: ret void } -; CHECK: xor_v_h_test: -; CHECK: ld.h -; CHECK: ld.h -; CHECK: xor.v -; CHECK: st.h -; CHECK: .size xor_v_h_test +; ANYENDIAN: xor_v_h_test: +; ANYENDIAN: ld.h +; ANYENDIAN: ld.h +; ANYENDIAN: xor.v +; ANYENDIAN: st.h +; ANYENDIAN: .size xor_v_h_test ; define void @xor_v_w_test() nounwind { @@ -913,12 +913,12 @@ entry: ret void } -; CHECK: xor_v_w_test: -; CHECK: ld.w -; CHECK: ld.w -; CHECK: xor.v -; CHECK: st.w -; CHECK: .size xor_v_w_test +; ANYENDIAN: xor_v_w_test: +; ANYENDIAN: ld.w +; ANYENDIAN: ld.w +; ANYENDIAN: xor.v +; ANYENDIAN: st.w +; ANYENDIAN: .size xor_v_w_test ; define void @xor_v_d_test() nounwind { @@ -930,12 +930,12 @@ entry: ret void } -; CHECK: xor_v_d_test: -; CHECK: ld.d -; CHECK: ld.d -; CHECK: xor.v -; CHECK: st.d -; CHECK: .size xor_v_d_test +; ANYENDIAN: xor_v_d_test: +; ANYENDIAN: ld.d +; ANYENDIAN: ld.d +; ANYENDIAN: xor.v +; ANYENDIAN: st.d +; ANYENDIAN: .size xor_v_d_test ; declare <16 x i8> @llvm.mips.and.v(<16 x i8>, <16 x i8>) nounwind declare <16 x i8> @llvm.mips.bmnz.v(<16 x i8>, <16 x i8>, <16 x i8>) nounwind diff --git a/test/CodeGen/R600/32-bit-local-address-space.ll b/test/CodeGen/R600/32-bit-local-address-space.ll index 7a126878bef..25ad97e2ea2 100644 --- a/test/CodeGen/R600/32-bit-local-address-space.ll +++ b/test/CodeGen/R600/32-bit-local-address-space.ll @@ -80,8 +80,8 @@ define void @infer_ptr_alignment_global_offset(float addrspace(1)* %out, i32 %ti @ptr = addrspace(3) global i32 addrspace(3)* null @dst = addrspace(3) global [16384 x i32] zeroinitializer -; SI-LABEL: @global_ptr: -; SI-CHECK: DS_WRITE_B32 +; CHECK-LABEL: @global_ptr: +; CHECK: DS_WRITE_B32 define void @global_ptr() nounwind { store i32 addrspace(3)* getelementptr ([16384 x i32] addrspace(3)* @dst, i32 0, i32 16), i32 addrspace(3)* addrspace(3)* @ptr ret void -- 2.34.1