From 17d47e423d93d0bbd50905d7045e43fd3c4a4a77 Mon Sep 17 00:00:00 2001
From: Chad Rosier <mcrosier@apple.com>
Date: Tue, 25 Oct 2011 01:22:20 +0000
Subject: [PATCH] Fix these test cases to not use .bc files.  Otherwise, we run
 into issues with bitcode reader/writer backward compatibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142896 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/Bitcode/sse42_crc32.ll      |  17 ++++++-
 test/Bitcode/sse42_crc32.ll.bc   | Bin 480 -> 0 bytes
 test/Bitcode/ssse3_palignr.ll    |  82 ++++++++++++++++++++++++++++++-
 test/Bitcode/ssse3_palignr.ll.bc | Bin 1504 -> 0 bytes
 4 files changed, 97 insertions(+), 2 deletions(-)
 delete mode 100644 test/Bitcode/sse42_crc32.ll.bc
 delete mode 100644 test/Bitcode/ssse3_palignr.ll.bc

diff --git a/test/Bitcode/sse42_crc32.ll b/test/Bitcode/sse42_crc32.ll
index 1c371c3a235..3f27d85589c 100644
--- a/test/Bitcode/sse42_crc32.ll
+++ b/test/Bitcode/sse42_crc32.ll
@@ -3,7 +3,7 @@
 ;
 ; Rdar: 9472944
 ;
-; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: opt < %s | llvm-dis | FileCheck %s
 
 ; crc32.8 should upgrade to crc32.32.8
 ; CHECK: i32 @llvm.x86.sse42.crc32.32.8(
@@ -26,3 +26,18 @@
 ; CHECK-NOT: i64 @llvm.x86.sse42.crc64.64(
 
 
+define void @foo() nounwind readnone ssp {
+entry:
+  %0 = call i32 @llvm.x86.sse42.crc32.8(i32 0, i8 0)
+  %1 = call i32 @llvm.x86.sse42.crc32.16(i32 0, i16 0)
+  %2 = call i32 @llvm.x86.sse42.crc32.32(i32 0, i32 0)
+  %3 = call i64 @llvm.x86.sse42.crc64.8(i64 0, i8 0)
+  %4 = call i64 @llvm.x86.sse42.crc64.64(i64 0, i64 0)
+  ret void
+}
+
+declare i32 @llvm.x86.sse42.crc32.8(i32, i8) nounwind readnone
+declare i32 @llvm.x86.sse42.crc32.16(i32, i16) nounwind readnone
+declare i32 @llvm.x86.sse42.crc32.32(i32, i32) nounwind readnone
+declare i64 @llvm.x86.sse42.crc64.8(i64, i8) nounwind readnone
+declare i64 @llvm.x86.sse42.crc64.64(i64, i64) nounwind readnone
diff --git a/test/Bitcode/sse42_crc32.ll.bc b/test/Bitcode/sse42_crc32.ll.bc
deleted file mode 100644
index d895fad2ac4b47ec98d5a39d6217cb580bae84be..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 480
zcmZ>AK5$Qwhk>D#fq{WhfPp~>NV7L8Pjo!N;>jjpWI2hkg-4Z@LsE{VJE=j$mC0!m
zx6={<BM}P@2~RE~7Zne#35v=`f*N=v6^m5ZPk0C>tyr+a;n)X8pgEor3=FJ5n!Dvc
z5Xc{ph*J0iVllWeFa#<vFaWJ%FjDg1R7h=VVNi4RVC7VEJ;v%3q{gwxlF49(vco9`
z2L(f>04ArUKo?pSvn&W`n<BK*Xo*P2SwV+Xh65Lw8JtC!85)4*Fi0%oabVy8G7bo^
zGBG&-84PV290CkXK!$-!W&_x^2E|iMEDb;rhL%PK1`!}F%;Km6at8|tyD@0=Fa$_3
zDwu<GF(|XKGO!#oObTFVNKgTBc-lZ5hDI3>M}(v4p##`>_5gviB8ea!3=EY}KO1v2
z$Q*enlP1Dw+u>}{!VHotRA69`0@7>-B7Mm$*EWUp)PLNi@5z$)+ezicj`Pt6x9W&K
zj^FdnTd48&J^@avcdvKw#+(i^{CD*AJ{7?oZ@DKH-2Rt4`v9u4?QgH|VvRskX2%b*
G5C{NUK!7#?

diff --git a/test/Bitcode/ssse3_palignr.ll b/test/Bitcode/ssse3_palignr.ll
index f62ca118c1b..eb844497d9d 100644
--- a/test/Bitcode/ssse3_palignr.ll
+++ b/test/Bitcode/ssse3_palignr.ll
@@ -1,2 +1,82 @@
-; RUN: llvm-dis < %s.bc | FileCheck %s 
+; RUN: opt < %s | llvm-dis | FileCheck %s
 ; CHECK-NOT: {@llvm\\.palign}
+
+define <4 x i32> @align1(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp {
+entry:
+  %0 = bitcast <4 x i32> %b to <2 x i64>          ; <<2 x i64>> [#uses=1]
+  %1 = bitcast <4 x i32> %a to <2 x i64>          ; <<2 x i64>> [#uses=1]
+  %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 15) ; <<2 x i64>> [#uses=1]
+  %3 = bitcast <2 x i64> %2 to <4 x i32>          ; <<4 x i32>> [#uses=1]
+  ret <4 x i32> %3
+}
+
+define double @align8(<2 x i32> %a, <2 x i32> %b) nounwind readnone ssp {
+entry:
+  %0 = bitcast <2 x i32> %b to <1 x i64>          ; <<1 x i64>> [#uses=1]
+  %1 = bitcast <2 x i32> %a to <1 x i64>          ; <<1 x i64>> [#uses=1]
+  %2 = tail call <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64> %1, <1 x i64> %0, i8 7) ; <<1 x i64>> [#uses=1]
+  %3 = extractelement <1 x i64> %2, i32 0         ; <i64> [#uses=1]
+  %retval12 = bitcast i64 %3 to double            ; <double> [#uses=1]
+  ret double %retval12
+}
+
+declare <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64>, <1 x i64>, i8) nounwind readnone
+
+define double @align7(<2 x i32> %a, <2 x i32> %b) nounwind readnone ssp {
+entry:
+  %0 = bitcast <2 x i32> %b to <1 x i64>          ; <<1 x i64>> [#uses=1]
+  %1 = bitcast <2 x i32> %a to <1 x i64>          ; <<1 x i64>> [#uses=1]
+  %2 = tail call <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64> %1, <1 x i64> %0, i8 16) ; <<1 x i64>> [#uses=1]
+  %3 = extractelement <1 x i64> %2, i32 0         ; <i64> [#uses=1]
+  %retval12 = bitcast i64 %3 to double            ; <double> [#uses=1]
+  ret double %retval12
+}
+
+define double @align6(<2 x i32> %a, <2 x i32> %b) nounwind readnone ssp {
+entry:
+  %0 = bitcast <2 x i32> %b to <1 x i64>          ; <<1 x i64>> [#uses=1]
+  %1 = bitcast <2 x i32> %a to <1 x i64>          ; <<1 x i64>> [#uses=1]
+  %2 = tail call <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64> %1, <1 x i64> %0, i8 9) ; <<1 x i64>> [#uses=1]
+  %3 = extractelement <1 x i64> %2, i32 0         ; <i64> [#uses=1]
+  %retval12 = bitcast i64 %3 to double            ; <double> [#uses=1]
+  ret double %retval12
+}
+
+define double @align5(<2 x i32> %a, <2 x i32> %b) nounwind readnone ssp {
+entry:
+  %0 = bitcast <2 x i32> %b to <1 x i64>          ; <<1 x i64>> [#uses=1]
+  %1 = bitcast <2 x i32> %a to <1 x i64>          ; <<1 x i64>> [#uses=1]
+  %2 = tail call <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64> %1, <1 x i64> %0, i8 8) ; <<1 x i64>> [#uses=1]
+  %3 = extractelement <1 x i64> %2, i32 0         ; <i64> [#uses=1]
+  %retval12 = bitcast i64 %3 to double            ; <double> [#uses=1]
+  ret double %retval12
+}
+
+define <4 x i32> @align4(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp {
+entry:
+  %0 = bitcast <4 x i32> %b to <2 x i64>          ; <<2 x i64>> [#uses=1]
+  %1 = bitcast <4 x i32> %a to <2 x i64>          ; <<2 x i64>> [#uses=1]
+  %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 32) ; <<2 x i64>> [#uses=1]
+  %3 = bitcast <2 x i64> %2 to <4 x i32>          ; <<4 x i32>> [#uses=1]
+  ret <4 x i32> %3
+}
+
+declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i8) nounwind readnone
+
+define <4 x i32> @align3(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp {
+entry:
+  %0 = bitcast <4 x i32> %b to <2 x i64>          ; <<2 x i64>> [#uses=1]
+  %1 = bitcast <4 x i32> %a to <2 x i64>          ; <<2 x i64>> [#uses=1]
+  %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 17) ; <<2 x i64>> [#uses=1]
+  %3 = bitcast <2 x i64> %2 to <4 x i32>          ; <<4 x i32>> [#uses=1]
+  ret <4 x i32> %3
+}
+
+define <4 x i32> @align2(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp {
+entry:
+  %0 = bitcast <4 x i32> %b to <2 x i64>          ; <<2 x i64>> [#uses=1]
+  %1 = bitcast <4 x i32> %a to <2 x i64>          ; <<2 x i64>> [#uses=1]
+  %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 16) ; <<2 x i64>> [#uses=1]
+  %3 = bitcast <2 x i64> %2 to <4 x i32>          ; <<4 x i32>> [#uses=1]
+  ret <4 x i32> %3
+}
diff --git a/test/Bitcode/ssse3_palignr.ll.bc b/test/Bitcode/ssse3_palignr.ll.bc
deleted file mode 100644
index 3fc9cdf15a358a1628f390844fec183b55fb3f8a..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 1504
zcmcIkZ)jUp6hAL{$$d@J?5$1P6sx|hu@tP5#u5{<V*Zn44ztk@>im#b+d5&<v~FFk
z17Et-#;lbr{@YL_YtnR}ps2L!r{HQA0=1nonIK~uiYNm+3S*!+&wWj4W54R*zI)F-
z=ic8r_uSuoSBuTHfTG8*qyiuSjN4PZYSaR}$l!zrs7D`(x1DyC*r1xX*fUH*`+$mT
zxsN^7C+U3(cc#{z=Pi00X9#L6UQ<AmHnuGul(a3zVG}6@cK4mno_8*-Ashq^02l^p
z6L(SWFB+Z}{-PTA0S*WNP3W`i3DgJ!;|XZ@1ynWdz9p6WU_1AbU12u(1xaL?7C)E9
z!QhuZ5ZRy4a%b9L!iWx52)@~I*{<j}FbY4Ed3T3rPhR`$`xcIdhK7ev6qSxUDo6ID
zl_R4P8R?j`3X`$)<SPMkJbBU<Q`)W+>wj5QuVu-IlZ-{kQCW$mbwgP)ifvW>n?%Os
zMvW0N#*>jOK?SET31rMnhO-0}oK_)3s=bkad3RMW-Zdo9a9jPV`Z|y?Y?#ujdVNFL
z$StB9#VJpQrAi;YrlWf!m1GdvlTm?$1&9Q`2EYpiExiT>fMl#uf)fp9lL)|}@|p?h
zfYmCd`xy|>V90a=u&8)4YL0p$fg8XGXh_7dYsIgDb#+oyN+h<NbB6MPay}fIeX=|o
z2^9{P3$f7LDEBSXHNEaU-F@KgW8&F)1cHTRkMHKOft3dxrL{P7Toi6E3P;{>*(es}
zNP&lWo+V*^SuZvX?=6lS_R~Z_6aenQaWgJ*7UP~1LNguZ8FMIS^Fv@cZkD6Tai)3(
zZay{mhs9Bn1};DU>_y)C`xl@8IH5!*J@fWBKg7L@z0AJodrP;Vwy%3Px@8ds06N)>
ziNyof4~M64T%h;{_l4HCthpGjQ=@G=W>W=IiFPWYP@O-uBNo@lPTR+EvyA6@ZpH5C
z3*+kxK01A`Cwu0@?+T4N7N2Dm_Fx735Zl%DM6`b5T6np?;i9rLdCBXKZ<TCEOu1&7
z8B=PeQ<LjX<@WwhHLJsXH)}@k!i4W!zV|M1y@n`cW^Jz(E|EnPHki77FRM{(>`l5D
zc>Tgp4c2qC+&j2(JGOOjinD{Gn!Goae_S)$o0@$_Q|M0>j%enNrshukha7#m@}GNz
zlUf(Aw+`x=o}|Z?kSQ>PIW=S6{s^VmmvshY_Vf!1^(TV=vqKVtcenOV_@RB@+-d&!
z&y4rV-)+8Ak2y!=#q$hZyg$l)|7q{ktGB*dF~55^aOs9;Q1&h~Qg59Ou{Y%(AJvP@

-- 
2.34.1