From 159b95c4842e4b0ad4734c1d92d341bd40100c86 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Thu, 12 Jun 2014 14:54:13 +0000 Subject: [PATCH] [mips][mips64r6] bc2[ft] are not available on MIPS32r6/MIPS64r6 Summary: These instructions are not implemented for any MIPS ISA so we only need testcases. Depends on D4110 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4111 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210786 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/Mips32r6InstrInfo.td | 2 -- .../Mips/mips32r6/invalid-mips1-wrong-error.s | 2 ++ .../mips32r6/invalid-mips32-wrong-error.s | 4 ++++ .../Mips/mips64r6/invalid-mips1-wrong-error.s | 2 ++ .../mips64r6/invalid-mips32-wrong-error.s | 20 +++++++++++++++++++ 5 files changed, 28 insertions(+), 2 deletions(-) create mode 100644 test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s diff --git a/lib/Target/Mips/Mips32r6InstrInfo.td b/lib/Target/Mips/Mips32r6InstrInfo.td index 401ac701583..d730d418ea7 100644 --- a/lib/Target/Mips/Mips32r6InstrInfo.td +++ b/lib/Target/Mips/Mips32r6InstrInfo.td @@ -26,8 +26,6 @@ include "Mips32r6InstrFormats.td" // Reencoded: sdc2 // Reencoded: swc2 // Removed: bc1any2, bc1any4 -// Removed: bc2[ft] -// Removed: bc2f, bc2t // Removed: bgezal // Removed: bltzal // Removed: bc1[ft] diff --git a/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s b/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s index aee068a93a8..52fa5f52b8d 100644 --- a/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s +++ b/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s @@ -5,6 +5,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction lwl $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction lwr $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction diff --git a/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s b/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s index e416a20ca1b..e63bdd4e707 100644 --- a/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s +++ b/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s @@ -10,6 +10,10 @@ bc1tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction bc1fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2f $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2t $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction bc2tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction diff --git a/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s b/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s index f7949bb0028..e914c899f66 100644 --- a/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s +++ b/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s @@ -5,6 +5,8 @@ # RUN: FileCheck %s < %t1 .set noat + bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction lwl $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction lwr $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction diff --git a/test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s b/test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s new file mode 100644 index 00000000000..cc85f188563 --- /dev/null +++ b/test/MC/Mips/mips64r6/invalid-mips32-wrong-error.s @@ -0,0 +1,20 @@ +# Instructions that are invalid and are correctly rejected but use the wrong +# error message at the moment. +# +# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \ +# RUN: 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + bc1fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc1tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2f $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2t $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction + bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction -- 2.34.1