From 14aaeac5cf8dd96859c4e74423f17a3da1c094c4 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Thu, 20 May 2010 01:35:50 +0000 Subject: [PATCH] Define the x86 pause instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104204 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrSSE.td | 4 ++++ test/MC/AsmParser/X86/x86_32-bit_cat.s | 6 ++++++ test/MC/AsmParser/X86/x86_32-new-encoder.s | 3 +++ 3 files changed, 13 insertions(+) diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 0f782c9a8fd..829f65c4623 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -2417,6 +2417,10 @@ def LFENCE : I<0xAE, MRM_E8, (outs), (ins), def MFENCE : I<0xAE, MRM_F0, (outs), (ins), "mfence", [(int_x86_sse2_mfence)]>, TB, Requires<[HasSSE2]>; +// Pause. This "instruction" is encoded as "rep; nop", so even though it +// was introduced with SSE2, it's backward compabitle. +def PAUSE : I<0x90, RawFrm, (outs), (ins), "pause", []>, REP; + //TODO: custom lower this so as to never even generate the noop def : Pat<(membarrier (i8 imm), (i8 imm), (i8 imm), (i8 imm), (i8 0)), (NOOP)>; diff --git a/test/MC/AsmParser/X86/x86_32-bit_cat.s b/test/MC/AsmParser/X86/x86_32-bit_cat.s index ec2bfa4a913..c1efe293c00 100644 --- a/test/MC/AsmParser/X86/x86_32-bit_cat.s +++ b/test/MC/AsmParser/X86/x86_32-bit_cat.s @@ -2482,6 +2482,12 @@ // CHECK: clflush 305419896 clflush 0x12345678 +// CHECK: pause + pause + +// CHECK: sfence + sfence + // CHECK: lfence lfence diff --git a/test/MC/AsmParser/X86/x86_32-new-encoder.s b/test/MC/AsmParser/X86/x86_32-new-encoder.s index 2400f5ad012..6c087761671 100644 --- a/test/MC/AsmParser/X86/x86_32-new-encoder.s +++ b/test/MC/AsmParser/X86/x86_32-new-encoder.s @@ -1,5 +1,8 @@ // RUN: llvm-mc -triple i386-unknown-unknown --show-encoding %s | FileCheck %s + pause +// CHECK: pause +// CHECK: encoding: [0xf3,0x90] sfence // CHECK: sfence // CHECK: encoding: [0x0f,0xae,0xf8] -- 2.34.1