From 131a8805205c383f67b3b6a11777401e27b90371 Mon Sep 17 00:00:00 2001 From: Nate Begeman Date: Thu, 18 Aug 2005 05:44:50 +0000 Subject: [PATCH] Maintain consistency in negating things git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22855 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 179888d7835..fdeb99eb55e 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -352,19 +352,18 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) { // 'not', then fold 'or' into 'nor', and so forth for the supported ops. if (isOprNot(N)) { unsigned Opc; - switch(N->getOperand(0).getOpcode()) { + SDOperand Val = Select(N->getOperand(0)); + switch (Val.getTargetOpcode()) { default: Opc = 0; break; - case ISD::OR: Opc = PPC::NOR; break; - case ISD::AND: Opc = PPC::NAND; break; - case ISD::XOR: Opc = PPC::EQV; break; + case PPC::OR: Opc = PPC::NOR; break; + case PPC::AND: Opc = PPC::NAND; break; + case PPC::XOR: Opc = PPC::EQV; break; } if (Opc) - CurDAG->SelectNodeTo(N, MVT::i32, Opc, - Select(N->getOperand(0).getOperand(0)), - Select(N->getOperand(0).getOperand(1))); + CurDAG->SelectNodeTo(N, MVT::i32, Opc, Val.getOperand(0), + Val.getOperand(1)); else - CurDAG->SelectNodeTo(N, MVT::i32, PPC::NOR, Select(N->getOperand(0)), - Select(N->getOperand(0))); + CurDAG->SelectNodeTo(N, MVT::i32, PPC::NOR, Val, Val); break; } // If this is a xor with an immediate other than -1, then codegen it as high -- 2.34.1