From 0e6ec124d56b3c93dcfca2e117e67575b29c7899 Mon Sep 17 00:00:00 2001 From: Cameron McInally Date: Tue, 26 Nov 2013 00:20:43 +0000 Subject: [PATCH] Add an intrinsic for the SSE2 PAUSE instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195697 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/IR/IntrinsicsX86.td | 2 ++ lib/Target/X86/X86InstrSSE.td | 4 +++- test/CodeGen/X86/sse2-intrinsics-x86.ll | 7 +++++++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/include/llvm/IR/IntrinsicsX86.td b/include/llvm/IR/IntrinsicsX86.td index 4c5718f8c8b..a68a8411b65 100644 --- a/include/llvm/IR/IntrinsicsX86.td +++ b/include/llvm/IR/IntrinsicsX86.td @@ -536,6 +536,8 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". Intrinsic<[], [], []>; def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">, Intrinsic<[], [], []>; + def int_x86_sse2_pause : GCCBuiltin<"__builtin_ia32_pause">, + Intrinsic<[], [], []>; } //===----------------------------------------------------------------------===// diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index a5debc02569..8c0076dfd40 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -3499,7 +3499,9 @@ def CLFLUSH : I<0xAE, MRM7m, (outs), (ins i8mem:$src), // Pause. This "instruction" is encoded as "rep; nop", so even though it // was introduced with SSE2, it's backward compatible. -def PAUSE : I<0x90, RawFrm, (outs), (ins), "pause", [], IIC_SSE_PAUSE>, REP; +def PAUSE : I<0x90, RawFrm, (outs), (ins), + "pause", [(int_x86_sse2_pause)], IIC_SSE_PAUSE>, + REP, Requires<[HasSSE2]>; // Load, store, and memory fence def SFENCE : I<0xAE, MRM_F8, (outs), (ins), diff --git a/test/CodeGen/X86/sse2-intrinsics-x86.ll b/test/CodeGen/X86/sse2-intrinsics-x86.ll index ff6c10bfe5a..cfc892daac2 100644 --- a/test/CodeGen/X86/sse2-intrinsics-x86.ll +++ b/test/CodeGen/X86/sse2-intrinsics-x86.ll @@ -710,3 +710,10 @@ define i32 @test_x86_sse2_ucomineq_sd(<2 x double> %a0, <2 x double> %a1) { ret i32 %res } declare i32 @llvm.x86.sse2.ucomineq.sd(<2 x double>, <2 x double>) nounwind readnone + +define void @test_x86_sse2_pause() { + ; CHECK: pause + tail call void @llvm.x86.sse2.pause() + ret void +} +declare void @llvm.x86.sse2.pause() nounwind -- 2.34.1