From 09d2a61cd4a15a641a72f8e2ff422fa3657f6047 Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Tue, 2 Dec 2014 23:53:43 +0000 Subject: [PATCH] AArch64: strengthen Darwin ABI alignment assumptions A global variable without an explicit alignment specified should be assumed to be ABI-aligned according to its type, like on other platforms. This allows us to use better memory operations when accessing it. rdar://18533701 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223180 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 2 +- test/CodeGen/AArch64/arm64-promote-const.ll | 15 +++++---------- test/CodeGen/AArch64/global-merge-1.ll | 1 + test/CodeGen/AArch64/global-merge-2.ll | 1 + 4 files changed, 8 insertions(+), 11 deletions(-) diff --git a/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp index 4456d2ac2c9..bb2e1e2b31b 100644 --- a/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -615,7 +615,7 @@ bool AArch64DAGToDAGISel::SelectAddrModeIndexed(SDValue N, unsigned Size, unsigned Alignment = GV->getAlignment(); const DataLayout *DL = TLI->getDataLayout(); Type *Ty = GV->getType()->getElementType(); - if (Alignment == 0 && Ty->isSized() && !Subtarget->isTargetDarwin()) + if (Alignment == 0 && Ty->isSized()) Alignment = DL->getABITypeAlignment(Ty); if (Alignment >= Size) diff --git a/test/CodeGen/AArch64/arm64-promote-const.ll b/test/CodeGen/AArch64/arm64-promote-const.ll index 380ff55d683..94fd8e33b89 100644 --- a/test/CodeGen/AArch64/arm64-promote-const.ll +++ b/test/CodeGen/AArch64/arm64-promote-const.ll @@ -41,8 +41,7 @@ entry: ; PROMOTED-LABEL: test2: ; In stress mode, constant vector are promoted ; PROMOTED: adrp [[PAGEADDR:x[0-9]+]], [[CSTV1:__PromotedConst[0-9]+]]@PAGE -; PROMOTED: add [[BASEADDR:x[0-9]+]], [[PAGEADDR]], [[CSTV1]]@PAGEOFF -; PROMOTED: ldr q[[REGNUM:[0-9]+]], {{\[}}[[BASEADDR]]] +; PROMOTED: ldr q[[REGNUM:[0-9]+]], {{\[}}[[PAGEADDR]], [[CSTV1]]@PAGEOFF] ; Destination register is defined by ABI ; PROMOTED-NEXT: add.16b v0, v0, v[[REGNUM]] ; PROMOTED-NEXT: mla.16b v0, v0, v[[REGNUM]] @@ -72,15 +71,13 @@ define <16 x i8> @test3(<16 x i8> %arg, i32 %path) { ; Since, the constant is the same as the previous function, ; the same address must be used ; PROMOTED: adrp [[PAGEADDR:x[0-9]+]], [[CSTV1]]@PAGE -; PROMOTED: add [[BASEADDR:x[0-9]+]], [[PAGEADDR]], [[CSTV1]]@PAGEOFF -; PROMOTED-NEXT: ldr q[[REGNUM:[0-9]+]], {{\[}}[[BASEADDR]]] +; PROMOTED-NEXT: ldr q[[REGNUM:[0-9]+]], {{\[}}[[PAGEADDR]], [[CSTV1]]@PAGEOFF] ; Destination register is defined by ABI ; PROMOTED-NEXT: add.16b v0, v0, v[[REGNUM]] ; PROMOTED-NEXT: cbnz w0, [[LABEL:LBB.*]] ; Next BB ; PROMOTED: adrp [[PAGEADDR:x[0-9]+]], [[CSTV2:__PromotedConst[0-9]+]]@PAGE -; PROMOTED: add [[BASEADDR:x[0-9]+]], [[PAGEADDR]], [[CSTV2]]@PAGEOFF -; PROMOTED-NEXT: ldr q[[REGNUM]], {{\[}}[[BASEADDR]]] +; PROMOTED-NEXT: ldr q[[REGNUM]], {{\[}}[[PAGEADDR]], [[CSTV2]]@PAGEOFF] ; Next BB ; PROMOTED-NEXT: [[LABEL]]: ; PROMOTED-NEXT: mul.16b [[DESTV:v[0-9]+]], v0, v[[REGNUM]] @@ -136,8 +133,7 @@ define <16 x i8> @test4(<16 x i8> %arg, i32 %path) { ; Since, the constant is the same as the previous function, ; the same address must be used ; PROMOTED: adrp [[PAGEADDR:x[0-9]+]], [[CSTV1]]@PAGE -; PROMOTED: add [[BASEADDR:x[0-9]+]], [[PAGEADDR]], [[CSTV1]]@PAGEOFF -; PROMOTED-NEXT: ldr q[[REGNUM:[0-9]+]], {{\[}}[[BASEADDR]]] +; PROMOTED-NEXT: ldr q[[REGNUM:[0-9]+]], {{\[}}[[PAGEADDR]], [[CSTV1]]@PAGEOFF] ; Destination register is defined by ABI ; PROMOTED-NEXT: add.16b v0, v0, v[[REGNUM]] ; PROMOTED-NEXT: cbz w0, [[LABEL:LBB.*]] @@ -185,8 +181,7 @@ define <16 x i8> @test5(<16 x i8> %arg, i32 %path) { ; Since, the constant is the same as the previous function, ; the same address must be used ; PROMOTED: adrp [[PAGEADDR:x[0-9]+]], [[CSTV1]]@PAGE -; PROMOTED: add [[BASEADDR:x[0-9]+]], [[PAGEADDR]], [[CSTV1]]@PAGEOFF -; PROMOTED-NEXT: ldr q[[REGNUM:[0-9]+]], {{\[}}[[BASEADDR]]] +; PROMOTED-NEXT: ldr q[[REGNUM:[0-9]+]], {{\[}}[[PAGEADDR]], [[CSTV1]]@PAGEOFF] ; PROMOTED-NEXT: cbz w0, [[LABEL:LBB.*]] ; Next BB ; PROMOTED: add.16b [[DESTV:v[0-9]+]], v0, v[[REGNUM]] diff --git a/test/CodeGen/AArch64/global-merge-1.ll b/test/CodeGen/AArch64/global-merge-1.ll index 68aba5ebe06..7dc8da1c444 100644 --- a/test/CodeGen/AArch64/global-merge-1.ll +++ b/test/CodeGen/AArch64/global-merge-1.ll @@ -11,6 +11,7 @@ @n = internal global i32 0, align 4 define void @f1(i32 %a1, i32 %a2) { +;CHECK-APPLE-IOS-NOT: adrp ;CHECK-APPLE-IOS: adrp x8, __MergedGlobals@PAGE ;CHECK-APPLE-IOS-NOT: adrp ;CHECK-APPLE-IOS: add x8, x8, __MergedGlobals@PAGEOFF diff --git a/test/CodeGen/AArch64/global-merge-2.ll b/test/CodeGen/AArch64/global-merge-2.ll index a7735667b35..70b700c7e57 100644 --- a/test/CodeGen/AArch64/global-merge-2.ll +++ b/test/CodeGen/AArch64/global-merge-2.ll @@ -8,6 +8,7 @@ define void @f1(i32 %a1, i32 %a2) { ;CHECK-APPLE-IOS-LABEL: _f1: +;CHECK-APPLE-IOS-NOT: adrp ;CHECK-APPLE-IOS: adrp x8, __MergedGlobals_x@PAGE ;CHECK-APPLE-IOS: add x8, x8, __MergedGlobals_x@PAGEOFF ;CHECK-APPLE-IOS-NOT: adrp -- 2.34.1