From 096191ff6ae4a8c5aeaf13231a4cc4a4ba63ac08 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Sat, 21 Nov 2015 13:25:50 +0000
Subject: [PATCH] [X86][SSE] Regenerate PSUBUS tests

Tidied up triple and regenerate tests using update_llc_test_checks.py

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253780 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/psubus.ll | 527 +++++++++++++++++++++++--------------
 1 file changed, 331 insertions(+), 196 deletions(-)

diff --git a/test/CodeGen/X86/psubus.ll b/test/CodeGen/X86/psubus.ll
index 4b83b55997e..ea328544b70 100644
--- a/test/CodeGen/X86/psubus.ll
+++ b/test/CodeGen/X86/psubus.ll
@@ -1,11 +1,21 @@
-; RUN: llc -mcpu=core2 < %s | FileCheck %s -check-prefix=SSSE3
-; RUN: llc -mcpu=corei7-avx < %s | FileCheck %s -check-prefix=AVX1
-; RUN: llc -mcpu=core-avx2 < %s | FileCheck %s -check-prefix=AVX2
-
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
-target triple = "x86_64-apple-macosx10.8.0"
+; RUN: llc -mtriple=x86_64-apple-macosx10.8.0 -mattr=+ssse3 < %s | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
+; RUN: llc -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2 < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
 
 define void @test1(i16* nocapture %head) nounwind {
+; SSE-LABEL: test1:
+; SSE:       ## BB#0: ## %vector.ph
+; SSE-NEXT:    movdqu (%rdi), %xmm0
+; SSE-NEXT:    psubusw {{.*}}(%rip), %xmm0
+; SSE-NEXT:    movdqu %xmm0, (%rdi)
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: test1:
+; AVX:       ## BB#0: ## %vector.ph
+; AVX-NEXT:    vmovdqu (%rdi), %xmm0
+; AVX-NEXT:    vpsubusw {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT:    vmovdqu %xmm0, (%rdi)
+; AVX-NEXT:    retq
 vector.ph:
   %0 = getelementptr inbounds i16, i16* %head, i64 0
   %1 = bitcast i16* %0 to <8 x i16>*
@@ -15,30 +25,22 @@ vector.ph:
   %5 = select <8 x i1> %3, <8 x i16> %4, <8 x i16> zeroinitializer
   store <8 x i16> %5, <8 x i16>* %1, align 2
   ret void
-
-; SSSE3: @test1
-; SSSE3:      # BB#0:
-; SSSE3-NEXT: movdqu (%rdi), %xmm0
-; SSSE3-NEXT: psubusw LCPI0_0(%rip), %xmm0
-; SSSE3-NEXT: movdqu %xmm0, (%rdi)
-; SSSE3-NEXT: retq
-
-; AVX1: @test1
-; AVX1:      # BB#0:
-; AVX1-NEXT: vmovdqu (%rdi), %xmm0
-; AVX1-NEXT: vpsubusw LCPI0_0(%rip), %xmm0, %xmm0
-; AVX1-NEXT: vmovdqu %xmm0, (%rdi)
-; AVX1-NEXT: retq
-
-; AVX2: @test1
-; AVX2:      # BB#0:
-; AVX2-NEXT: vmovdqu (%rdi), %xmm0
-; AVX2-NEXT: vpsubusw LCPI0_0(%rip), %xmm0, %xmm0
-; AVX2-NEXT: vmovdqu %xmm0, (%rdi)
-; AVX2-NEXT: retq
 }
 
 define void @test2(i16* nocapture %head) nounwind {
+; SSE-LABEL: test2:
+; SSE:       ## BB#0: ## %vector.ph
+; SSE-NEXT:    movdqu (%rdi), %xmm0
+; SSE-NEXT:    psubusw {{.*}}(%rip), %xmm0
+; SSE-NEXT:    movdqu %xmm0, (%rdi)
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: test2:
+; AVX:       ## BB#0: ## %vector.ph
+; AVX-NEXT:    vmovdqu (%rdi), %xmm0
+; AVX-NEXT:    vpsubusw {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT:    vmovdqu %xmm0, (%rdi)
+; AVX-NEXT:    retq
 vector.ph:
   %0 = getelementptr inbounds i16, i16* %head, i64 0
   %1 = bitcast i16* %0 to <8 x i16>*
@@ -48,30 +50,35 @@ vector.ph:
   %5 = select <8 x i1> %3, <8 x i16> %4, <8 x i16> zeroinitializer
   store <8 x i16> %5, <8 x i16>* %1, align 2
   ret void
-
-; SSSE3: @test2
-; SSSE3:      # BB#0:
-; SSSE3-NEXT: movdqu (%rdi), %xmm0
-; SSSE3-NEXT: psubusw LCPI1_0(%rip), %xmm0
-; SSSE3-NEXT: movdqu %xmm0, (%rdi)
-; SSSE3-NEXT: retq
-
-; AVX1: @test2
-; AVX1:      # BB#0:
-; AVX1-NEXT: vmovdqu (%rdi), %xmm0
-; AVX1-NEXT: vpsubusw LCPI1_0(%rip), %xmm0, %xmm0
-; AVX1-NEXT: vmovdqu %xmm0, (%rdi)
-; AVX1-NEXT: retq
-
-; AVX2: @test2
-; AVX2:      # BB#0:
-; AVX2-NEXT: vmovdqu (%rdi), %xmm0
-; AVX2-NEXT: vpsubusw LCPI1_0(%rip), %xmm0, %xmm0
-; AVX2-NEXT: vmovdqu %xmm0, (%rdi)
-; AVX2-NEXT: retq
 }
 
 define void @test3(i16* nocapture %head, i16 zeroext %w) nounwind {
+; SSE-LABEL: test3:
+; SSE:       ## BB#0: ## %vector.ph
+; SSE-NEXT:    movd %esi, %xmm0
+; SSE-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
+; SSE-NEXT:    movdqu (%rdi), %xmm1
+; SSE-NEXT:    psubusw %xmm0, %xmm1
+; SSE-NEXT:    movdqu %xmm1, (%rdi)
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: test3:
+; AVX1:       ## BB#0: ## %vector.ph
+; AVX1-NEXT:    vmovd %esi, %xmm0
+; AVX1-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
+; AVX1-NEXT:    vmovdqu (%rdi), %xmm1
+; AVX1-NEXT:    vpsubusw %xmm0, %xmm1, %xmm0
+; AVX1-NEXT:    vmovdqu %xmm0, (%rdi)
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: test3:
+; AVX2:       ## BB#0: ## %vector.ph
+; AVX2-NEXT:    vmovd %esi, %xmm0
+; AVX2-NEXT:    vpbroadcastw %xmm0, %xmm0
+; AVX2-NEXT:    vmovdqu (%rdi), %xmm1
+; AVX2-NEXT:    vpsubusw %xmm0, %xmm1, %xmm0
+; AVX2-NEXT:    vmovdqu %xmm0, (%rdi)
+; AVX2-NEXT:    retq
 vector.ph:
   %0 = insertelement <8 x i16> undef, i16 %w, i32 0
   %broadcast15 = shufflevector <8 x i16> %0, <8 x i16> undef, <8 x i32> zeroinitializer
@@ -83,36 +90,22 @@ vector.ph:
   %6 = select <8 x i1> %4, <8 x i16> zeroinitializer, <8 x i16> %5
   store <8 x i16> %6, <8 x i16>* %2, align 2
   ret void
-
-; SSSE3: @test3
-; SSSE3:      # BB#0:
-; SSSE3-NEXT: movd %esi, %xmm0
-; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
-; SSSE3-NEXT: movdqu (%rdi), %xmm1
-; SSSE3-NEXT: psubusw %xmm0, %xmm1
-; SSSE3-NEXT: movdqu %xmm1, (%rdi)
-; SSSE3-NEXT: retq
-
-; AVX1: @test3
-; AVX1:      # BB#0:
-; AVX1-NEXT: vmovd %esi, %xmm0
-; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
-; AVX1-NEXT: vmovdqu (%rdi), %xmm1
-; AVX1-NEXT: vpsubusw %xmm0, %xmm1, %xmm0
-; AVX1-NEXT: vmovdqu %xmm0, (%rdi)
-; AVX1-NEXT: retq
-
-; AVX2: @test3
-; AVX2:      # BB#0:
-; AVX2-NEXT: vmovd %esi, %xmm0
-; AVX2-NEXT: vpbroadcastw %xmm0, %xmm0
-; AVX2-NEXT: vmovdqu (%rdi), %xmm1
-; AVX2-NEXT: vpsubusw %xmm0, %xmm1, %xmm0
-; AVX2-NEXT: vmovdqu %xmm0, (%rdi)
-; AVX2-NEXT: retq
 }
 
 define void @test4(i8* nocapture %head) nounwind {
+; SSE-LABEL: test4:
+; SSE:       ## BB#0: ## %vector.ph
+; SSE-NEXT:    movdqu (%rdi), %xmm0
+; SSE-NEXT:    psubusb {{.*}}(%rip), %xmm0
+; SSE-NEXT:    movdqu %xmm0, (%rdi)
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: test4:
+; AVX:       ## BB#0: ## %vector.ph
+; AVX-NEXT:    vmovdqu (%rdi), %xmm0
+; AVX-NEXT:    vpsubusb {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT:    vmovdqu %xmm0, (%rdi)
+; AVX-NEXT:    retq
 vector.ph:
   %0 = getelementptr inbounds i8, i8* %head, i64 0
   %1 = bitcast i8* %0 to <16 x i8>*
@@ -122,30 +115,22 @@ vector.ph:
   %5 = select <16 x i1> %3, <16 x i8> %4, <16 x i8> zeroinitializer
   store <16 x i8> %5, <16 x i8>* %1, align 1
   ret void
-
-; SSSE3: @test4
-; SSSE3:      # BB#0:
-; SSSE3-NEXT: movdqu (%rdi), %xmm0
-; SSSE3-NEXT: psubusb LCPI3_0(%rip), %xmm0
-; SSSE3-NEXT: movdqu %xmm0, (%rdi)
-; SSSE3-NEXT: retq
-
-; AVX1: @test4
-; AVX1:      # BB#0:
-; AVX1-NEXT: vmovdqu (%rdi), %xmm0
-; AVX1-NEXT: vpsubusb LCPI3_0(%rip), %xmm0, %xmm0
-; AVX1-NEXT: vmovdqu %xmm0, (%rdi)
-; AVX1-NEXT: retq
-
-; AVX2: @test4
-; AVX2:      # BB#0:
-; AVX2-NEXT: vmovdqu (%rdi), %xmm0
-; AVX2-NEXT: vpsubusb LCPI3_0(%rip), %xmm0, %xmm0
-; AVX2-NEXT: vmovdqu %xmm0, (%rdi)
-; AVX2-NEXT: retq
 }
 
 define void @test5(i8* nocapture %head) nounwind {
+; SSE-LABEL: test5:
+; SSE:       ## BB#0: ## %vector.ph
+; SSE-NEXT:    movdqu (%rdi), %xmm0
+; SSE-NEXT:    psubusb {{.*}}(%rip), %xmm0
+; SSE-NEXT:    movdqu %xmm0, (%rdi)
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: test5:
+; AVX:       ## BB#0: ## %vector.ph
+; AVX-NEXT:    vmovdqu (%rdi), %xmm0
+; AVX-NEXT:    vpsubusb {{.*}}(%rip), %xmm0, %xmm0
+; AVX-NEXT:    vmovdqu %xmm0, (%rdi)
+; AVX-NEXT:    retq
 vector.ph:
   %0 = getelementptr inbounds i8, i8* %head, i64 0
   %1 = bitcast i8* %0 to <16 x i8>*
@@ -155,30 +140,37 @@ vector.ph:
   %5 = select <16 x i1> %3, <16 x i8> %4, <16 x i8> zeroinitializer
   store <16 x i8> %5, <16 x i8>* %1, align 1
   ret void
-
-; SSSE3: @test5
-; SSSE3:      # BB#0:
-; SSSE3-NEXT: movdqu (%rdi), %xmm0
-; SSSE3-NEXT: psubusb LCPI4_0(%rip), %xmm0
-; SSSE3-NEXT: movdqu %xmm0, (%rdi)
-; SSSE3-NEXT: retq
-
-; AVX1: @test5
-; AVX1:      # BB#0:
-; AVX1-NEXT: vmovdqu (%rdi), %xmm0
-; AVX1-NEXT: vpsubusb LCPI4_0(%rip), %xmm0
-; AVX1-NEXT: vmovdqu %xmm0, (%rdi)
-; AVX1-NEXT: retq
-
-; AVX2: @test5
-; AVX2:      # BB#0:
-; AVX2-NEXT: vmovdqu (%rdi), %xmm0
-; AVX2-NEXT: vpsubusb LCPI4_0(%rip), %xmm0
-; AVX2-NEXT: vmovdqu %xmm0, (%rdi)
-; AVX2-NEXT: retq
 }
 
 define void @test6(i8* nocapture %head, i8 zeroext %w) nounwind {
+; SSE-LABEL: test6:
+; SSE:       ## BB#0: ## %vector.ph
+; SSE-NEXT:    movd %esi, %xmm0
+; SSE-NEXT:    pxor %xmm1, %xmm1
+; SSE-NEXT:    pshufb %xmm1, %xmm0
+; SSE-NEXT:    movdqu (%rdi), %xmm1
+; SSE-NEXT:    psubusb %xmm0, %xmm1
+; SSE-NEXT:    movdqu %xmm1, (%rdi)
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: test6:
+; AVX1:       ## BB#0: ## %vector.ph
+; AVX1-NEXT:    vmovd %esi, %xmm0
+; AVX1-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; AVX1-NEXT:    vpshufb %xmm1, %xmm0, %xmm0
+; AVX1-NEXT:    vmovdqu (%rdi), %xmm1
+; AVX1-NEXT:    vpsubusb %xmm0, %xmm1, %xmm0
+; AVX1-NEXT:    vmovdqu %xmm0, (%rdi)
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: test6:
+; AVX2:       ## BB#0: ## %vector.ph
+; AVX2-NEXT:    vmovd %esi, %xmm0
+; AVX2-NEXT:    vpbroadcastb %xmm0, %xmm0
+; AVX2-NEXT:    vmovdqu (%rdi), %xmm1
+; AVX2-NEXT:    vpsubusb %xmm0, %xmm1, %xmm0
+; AVX2-NEXT:    vmovdqu %xmm0, (%rdi)
+; AVX2-NEXT:    retq
 vector.ph:
   %0 = insertelement <16 x i8> undef, i8 %w, i32 0
   %broadcast15 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> zeroinitializer
@@ -190,38 +182,41 @@ vector.ph:
   %6 = select <16 x i1> %4, <16 x i8> zeroinitializer, <16 x i8> %5
   store <16 x i8> %6, <16 x i8>* %2, align 1
   ret void
-
-; SSSE3: @test6
-; SSSE3:      # BB#0:
-; SSSE3-NEXT: movd %esi, %xmm0
-; SSSE3-NEXT: pxor %xmm1, %xmm1
-; SSSE3-NEXT: pshufb %xmm1, %xmm0
-; SSSE3-NEXT: movdqu (%rdi), %xmm1
-; SSSE3-NEXT: psubusb %xmm0, %xmm1
-; SSSE3-NEXT: movdqu %xmm1, (%rdi)
-; SSSE3-NEXT: retq
-
-; AVX1: @test6
-; AVX1:      # BB#0:
-; AVX1-NEXT: vmovd %esi, %xmm0
-; AVX1-NEXT: vpxor %xmm1, %xmm1
-; AVX1-NEXT: vpshufb %xmm1, %xmm0
-; AVX1-NEXT: vmovdqu (%rdi), %xmm1
-; AVX1-NEXT: vpsubusb %xmm0, %xmm1, %xmm0
-; AVX1-NEXT: vmovdqu %xmm0, (%rdi)
-; AVX1-NEXT: retq
-
-; AVX2: @test6
-; AVX2:      # BB#0:
-; AVX2-NEXT: vmovd %esi, %xmm0
-; AVX2-NEXT: vpbroadcastb %xmm0, %xmm0
-; AVX2-NEXT: vmovdqu (%rdi), %xmm1
-; AVX2-NEXT: vpsubusb %xmm0, %xmm1, %xmm0
-; AVX2-NEXT: vmovdqu %xmm0, (%rdi)
-; AVX2-NEXT: retq
 }
 
 define void @test7(i16* nocapture %head) nounwind {
+; SSE-LABEL: test7:
+; SSE:       ## BB#0: ## %vector.ph
+; SSE-NEXT:    movdqu (%rdi), %xmm0
+; SSE-NEXT:    movdqu 16(%rdi), %xmm1
+; SSE-NEXT:    movdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
+; SSE-NEXT:    psubusw %xmm2, %xmm0
+; SSE-NEXT:    psubusw %xmm2, %xmm1
+; SSE-NEXT:    movdqu %xmm1, 16(%rdi)
+; SSE-NEXT:    movdqu %xmm0, (%rdi)
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: test7:
+; AVX1:       ## BB#0: ## %vector.ph
+; AVX1-NEXT:    vmovups (%rdi), %ymm0
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
+; AVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
+; AVX1-NEXT:    vpcmpgtw %xmm1, %xmm2, %xmm1
+; AVX1-NEXT:    vpcmpgtw %xmm0, %xmm2, %xmm2
+; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm2, %ymm1
+; AVX1-NEXT:    vxorps {{.*}}(%rip), %ymm0, %ymm0
+; AVX1-NEXT:    vandps %ymm0, %ymm1, %ymm0
+; AVX1-NEXT:    vmovups %ymm0, (%rdi)
+; AVX1-NEXT:    vzeroupper
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: test7:
+; AVX2:       ## BB#0: ## %vector.ph
+; AVX2-NEXT:    vmovdqu (%rdi), %ymm0
+; AVX2-NEXT:    vpsubusw {{.*}}(%rip), %ymm0, %ymm0
+; AVX2-NEXT:    vmovdqu %ymm0, (%rdi)
+; AVX2-NEXT:    vzeroupper
+; AVX2-NEXT:    retq
 vector.ph:
   %0 = getelementptr inbounds i16, i16* %head, i64 0
   %1 = bitcast i16* %0 to <16 x i16>*
@@ -231,17 +226,47 @@ vector.ph:
   %5 = select <16 x i1> %3, <16 x i16> %4, <16 x i16> zeroinitializer
   store <16 x i16> %5, <16 x i16>* %1, align 2
   ret void
-
-; AVX2: @test7
-; AVX2:      # BB#0:
-; AVX2-NEXT: vmovdqu (%rdi), %ymm0
-; AVX2-NEXT: vpsubusw LCPI6_0(%rip), %ymm0, %ymm0
-; AVX2-NEXT: vmovdqu %ymm0, (%rdi)
-; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
 }
 
 define void @test8(i16* nocapture %head) nounwind {
+; SSE-LABEL: test8:
+; SSE:       ## BB#0: ## %vector.ph
+; SSE-NEXT:    movdqu (%rdi), %xmm0
+; SSE-NEXT:    movdqu 16(%rdi), %xmm1
+; SSE-NEXT:    movdqa {{.*#+}} xmm2 = [32767,32767,32767,32767,32767,32767,32767,32767]
+; SSE-NEXT:    psubusw %xmm2, %xmm0
+; SSE-NEXT:    psubusw %xmm2, %xmm1
+; SSE-NEXT:    movdqu %xmm1, 16(%rdi)
+; SSE-NEXT:    movdqu %xmm0, (%rdi)
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: test8:
+; AVX1:       ## BB#0: ## %vector.ph
+; AVX1-NEXT:    vmovups (%rdi), %ymm0
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
+; AVX1-NEXT:    vmovaps {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
+; AVX1-NEXT:    vxorps %xmm2, %xmm1, %xmm3
+; AVX1-NEXT:    vmovdqa {{.*#+}} xmm4 = [65534,65534,65534,65534,65534,65534,65534,65534]
+; AVX1-NEXT:    vpcmpgtw %xmm4, %xmm3, %xmm3
+; AVX1-NEXT:    vxorps %xmm2, %xmm0, %xmm2
+; AVX1-NEXT:    vpcmpgtw %xmm4, %xmm2, %xmm2
+; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm2, %ymm2
+; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [32769,32769,32769,32769,32769,32769,32769,32769]
+; AVX1-NEXT:    vpaddw %xmm3, %xmm1, %xmm1
+; AVX1-NEXT:    vpaddw %xmm3, %xmm0, %xmm0
+; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
+; AVX1-NEXT:    vandps %ymm0, %ymm2, %ymm0
+; AVX1-NEXT:    vmovups %ymm0, (%rdi)
+; AVX1-NEXT:    vzeroupper
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: test8:
+; AVX2:       ## BB#0: ## %vector.ph
+; AVX2-NEXT:    vmovdqu (%rdi), %ymm0
+; AVX2-NEXT:    vpsubusw {{.*}}(%rip), %ymm0, %ymm0
+; AVX2-NEXT:    vmovdqu %ymm0, (%rdi)
+; AVX2-NEXT:    vzeroupper
+; AVX2-NEXT:    retq
 vector.ph:
   %0 = getelementptr inbounds i16, i16* %head, i64 0
   %1 = bitcast i16* %0 to <16 x i16>*
@@ -252,16 +277,49 @@ vector.ph:
   store <16 x i16> %5, <16 x i16>* %1, align 2
   ret void
 
-; AVX2: @test8
-; AVX2:      # BB#0:
-; AVX2-NEXT: vmovdqu (%rdi), %ymm0
-; AVX2-NEXT: vpsubusw LCPI7_0(%rip), %ymm0, %ymm0
-; AVX2-NEXT: vmovdqu %ymm0, (%rdi)
-; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
 }
 
 define void @test9(i16* nocapture %head, i16 zeroext %w) nounwind {
+; SSE-LABEL: test9:
+; SSE:       ## BB#0: ## %vector.ph
+; SSE-NEXT:    movd %esi, %xmm0
+; SSE-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
+; SSE-NEXT:    movdqu (%rdi), %xmm1
+; SSE-NEXT:    movdqu 16(%rdi), %xmm2
+; SSE-NEXT:    psubusw %xmm0, %xmm1
+; SSE-NEXT:    psubusw %xmm0, %xmm2
+; SSE-NEXT:    movdqu %xmm2, 16(%rdi)
+; SSE-NEXT:    movdqu %xmm1, (%rdi)
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: test9:
+; AVX1:       ## BB#0: ## %vector.ph
+; AVX1-NEXT:    vmovups (%rdi), %ymm0
+; AVX1-NEXT:    vmovd %esi, %xmm1
+; AVX1-NEXT:    vpshufb {{.*#+}} xmm1 = xmm1[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
+; AVX1-NEXT:    vpsubw %xmm1, %xmm2, %xmm3
+; AVX1-NEXT:    vpsubw %xmm1, %xmm0, %xmm4
+; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm4, %ymm3
+; AVX1-NEXT:    vpmaxuw %xmm1, %xmm2, %xmm4
+; AVX1-NEXT:    vpcmpeqw %xmm4, %xmm2, %xmm2
+; AVX1-NEXT:    vpmaxuw %xmm1, %xmm0, %xmm1
+; AVX1-NEXT:    vpcmpeqw %xmm1, %xmm0, %xmm0
+; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
+; AVX1-NEXT:    vandps %ymm3, %ymm0, %ymm0
+; AVX1-NEXT:    vmovups %ymm0, (%rdi)
+; AVX1-NEXT:    vzeroupper
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: test9:
+; AVX2:       ## BB#0: ## %vector.ph
+; AVX2-NEXT:    vmovd %esi, %xmm0
+; AVX2-NEXT:    vpbroadcastw %xmm0, %ymm0
+; AVX2-NEXT:    vmovdqu (%rdi), %ymm1
+; AVX2-NEXT:    vpsubusw %ymm0, %ymm1, %ymm0
+; AVX2-NEXT:    vmovdqu %ymm0, (%rdi)
+; AVX2-NEXT:    vzeroupper
+; AVX2-NEXT:    retq
 vector.ph:
   %0 = insertelement <16 x i16> undef, i16 %w, i32 0
   %broadcast15 = shufflevector <16 x i16> %0, <16 x i16> undef, <16 x i32> zeroinitializer
@@ -273,19 +331,41 @@ vector.ph:
   %6 = select <16 x i1> %4, <16 x i16> zeroinitializer, <16 x i16> %5
   store <16 x i16> %6, <16 x i16>* %2, align 2
   ret void
-
-; AVX2: @test9
-; AVX2:      # BB#0:
-; AVX2-NEXT: vmovd %esi, %xmm0
-; AVX2-NEXT: vpbroadcastw %xmm0, %ymm0
-; AVX2-NEXT: vmovdqu (%rdi), %ymm1
-; AVX2-NEXT: vpsubusw %ymm0, %ymm1, %ymm0
-; AVX2-NEXT: vmovdqu %ymm0, (%rdi)
-; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
 }
 
 define void @test10(i8* nocapture %head) nounwind {
+; SSE-LABEL: test10:
+; SSE:       ## BB#0: ## %vector.ph
+; SSE-NEXT:    movdqu (%rdi), %xmm0
+; SSE-NEXT:    movdqu 16(%rdi), %xmm1
+; SSE-NEXT:    movdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]
+; SSE-NEXT:    psubusb %xmm2, %xmm0
+; SSE-NEXT:    psubusb %xmm2, %xmm1
+; SSE-NEXT:    movdqu %xmm1, 16(%rdi)
+; SSE-NEXT:    movdqu %xmm0, (%rdi)
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: test10:
+; AVX1:       ## BB#0: ## %vector.ph
+; AVX1-NEXT:    vmovups (%rdi), %ymm0
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
+; AVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
+; AVX1-NEXT:    vpcmpgtb %xmm1, %xmm2, %xmm1
+; AVX1-NEXT:    vpcmpgtb %xmm0, %xmm2, %xmm2
+; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm2, %ymm1
+; AVX1-NEXT:    vxorps {{.*}}(%rip), %ymm0, %ymm0
+; AVX1-NEXT:    vandps %ymm0, %ymm1, %ymm0
+; AVX1-NEXT:    vmovups %ymm0, (%rdi)
+; AVX1-NEXT:    vzeroupper
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: test10:
+; AVX2:       ## BB#0: ## %vector.ph
+; AVX2-NEXT:    vmovdqu (%rdi), %ymm0
+; AVX2-NEXT:    vpsubusb {{.*}}(%rip), %ymm0, %ymm0
+; AVX2-NEXT:    vmovdqu %ymm0, (%rdi)
+; AVX2-NEXT:    vzeroupper
+; AVX2-NEXT:    retq
 vector.ph:
   %0 = getelementptr inbounds i8, i8* %head, i64 0
   %1 = bitcast i8* %0 to <32 x i8>*
@@ -296,16 +376,47 @@ vector.ph:
   store <32 x i8> %5, <32 x i8>* %1, align 1
   ret void
 
-; AVX2: @test10
-; AVX2:      # BB#0:
-; AVX2-NEXT: vmovdqu (%rdi), %ymm0
-; AVX2-NEXT: vpsubusb LCPI9_0(%rip), %ymm0, %ymm0
-; AVX2-NEXT: vmovdqu %ymm0, (%rdi)
-; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
 }
 
 define void @test11(i8* nocapture %head) nounwind {
+; SSE-LABEL: test11:
+; SSE:       ## BB#0: ## %vector.ph
+; SSE-NEXT:    movdqu (%rdi), %xmm0
+; SSE-NEXT:    movdqu 16(%rdi), %xmm1
+; SSE-NEXT:    movdqa {{.*#+}} xmm2 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]
+; SSE-NEXT:    psubusb %xmm2, %xmm0
+; SSE-NEXT:    psubusb %xmm2, %xmm1
+; SSE-NEXT:    movdqu %xmm1, 16(%rdi)
+; SSE-NEXT:    movdqu %xmm0, (%rdi)
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: test11:
+; AVX1:       ## BB#0: ## %vector.ph
+; AVX1-NEXT:    vmovups (%rdi), %ymm0
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
+; AVX1-NEXT:    vmovaps {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]
+; AVX1-NEXT:    vxorps %xmm2, %xmm1, %xmm3
+; AVX1-NEXT:    vmovdqa {{.*#+}} xmm4 = [254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254]
+; AVX1-NEXT:    vpcmpgtb %xmm4, %xmm3, %xmm3
+; AVX1-NEXT:    vxorps %xmm2, %xmm0, %xmm2
+; AVX1-NEXT:    vpcmpgtb %xmm4, %xmm2, %xmm2
+; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm2, %ymm2
+; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129]
+; AVX1-NEXT:    vpaddb %xmm3, %xmm1, %xmm1
+; AVX1-NEXT:    vpaddb %xmm3, %xmm0, %xmm0
+; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
+; AVX1-NEXT:    vandps %ymm0, %ymm2, %ymm0
+; AVX1-NEXT:    vmovups %ymm0, (%rdi)
+; AVX1-NEXT:    vzeroupper
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: test11:
+; AVX2:       ## BB#0: ## %vector.ph
+; AVX2-NEXT:    vmovdqu (%rdi), %ymm0
+; AVX2-NEXT:    vpsubusb {{.*}}(%rip), %ymm0, %ymm0
+; AVX2-NEXT:    vmovdqu %ymm0, (%rdi)
+; AVX2-NEXT:    vzeroupper
+; AVX2-NEXT:    retq
 vector.ph:
   %0 = getelementptr inbounds i8, i8* %head, i64 0
   %1 = bitcast i8* %0 to <32 x i8>*
@@ -315,17 +426,51 @@ vector.ph:
   %5 = select <32 x i1> %3, <32 x i8> %4, <32 x i8> zeroinitializer
   store <32 x i8> %5, <32 x i8>* %1, align 1
   ret void
-
-; AVX2: @test11
-; AVX2:      # BB#0:
-; AVX2-NEXT: vmovdqu (%rdi), %ymm0
-; AVX2-NEXT: vpsubusb LCPI10_0(%rip), %ymm0, %ymm0
-; AVX2-NEXT: vmovdqu %ymm0, (%rdi)
-; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
 }
 
 define void @test12(i8* nocapture %head, i8 zeroext %w) nounwind {
+; SSE-LABEL: test12:
+; SSE:       ## BB#0: ## %vector.ph
+; SSE-NEXT:    movd %esi, %xmm0
+; SSE-NEXT:    pxor %xmm1, %xmm1
+; SSE-NEXT:    pshufb %xmm1, %xmm0
+; SSE-NEXT:    movdqu (%rdi), %xmm1
+; SSE-NEXT:    movdqu 16(%rdi), %xmm2
+; SSE-NEXT:    psubusb %xmm0, %xmm1
+; SSE-NEXT:    psubusb %xmm0, %xmm2
+; SSE-NEXT:    movdqu %xmm2, 16(%rdi)
+; SSE-NEXT:    movdqu %xmm1, (%rdi)
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: test12:
+; AVX1:       ## BB#0: ## %vector.ph
+; AVX1-NEXT:    vmovups (%rdi), %ymm0
+; AVX1-NEXT:    vmovd %esi, %xmm1
+; AVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
+; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
+; AVX1-NEXT:    vpsubb %xmm1, %xmm2, %xmm3
+; AVX1-NEXT:    vpsubb %xmm1, %xmm0, %xmm4
+; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm4, %ymm3
+; AVX1-NEXT:    vpmaxub %xmm1, %xmm2, %xmm4
+; AVX1-NEXT:    vpcmpeqb %xmm4, %xmm2, %xmm2
+; AVX1-NEXT:    vpmaxub %xmm1, %xmm0, %xmm1
+; AVX1-NEXT:    vpcmpeqb %xmm1, %xmm0, %xmm0
+; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
+; AVX1-NEXT:    vandps %ymm3, %ymm0, %ymm0
+; AVX1-NEXT:    vmovups %ymm0, (%rdi)
+; AVX1-NEXT:    vzeroupper
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: test12:
+; AVX2:       ## BB#0: ## %vector.ph
+; AVX2-NEXT:    vmovd %esi, %xmm0
+; AVX2-NEXT:    vpbroadcastb %xmm0, %ymm0
+; AVX2-NEXT:    vmovdqu (%rdi), %ymm1
+; AVX2-NEXT:    vpsubusb %ymm0, %ymm1, %ymm0
+; AVX2-NEXT:    vmovdqu %ymm0, (%rdi)
+; AVX2-NEXT:    vzeroupper
+; AVX2-NEXT:    retq
 vector.ph:
   %0 = insertelement <32 x i8> undef, i8 %w, i32 0
   %broadcast15 = shufflevector <32 x i8> %0, <32 x i8> undef, <32 x i32> zeroinitializer
@@ -337,14 +482,4 @@ vector.ph:
   %6 = select <32 x i1> %4, <32 x i8> zeroinitializer, <32 x i8> %5
   store <32 x i8> %6, <32 x i8>* %2, align 1
   ret void
-
-; AVX2: @test12
-; AVX2:      # BB#0:
-; AVX2-NEXT: vmovd %esi, %xmm0
-; AVX2-NEXT: vpbroadcastb %xmm0, %ymm0
-; AVX2-NEXT: vmovdqu (%rdi), %ymm1
-; AVX2-NEXT: vpsubusb %ymm0, %ymm1, %ymm0
-; AVX2-NEXT: vmovdqu %ymm0, (%rdi)
-; AVX2-NEXT: vzeroupper
-; AVX2-NEXT: retq
 }
-- 
2.34.1