From 077e4724662d4522cf9a66d4647f5062c0b9989f Mon Sep 17 00:00:00 2001 From: =?utf8?q?=E9=BB=84=E6=B6=9B?= Date: Fri, 24 Sep 2010 18:05:15 +0800 Subject: [PATCH] =?utf8?q?clock:=20ARM=E8=BF=90=E8=A1=8C=E5=9C=A8192?= =?utf8?q?=E6=97=B6=EF=BC=8CAHB=E4=BF=9D=E6=8C=81=E4=B8=BA192=EF=BC=8C?= =?utf8?q?=E4=B8=B4=E6=97=B6=E8=A7=A3=E5=86=B3=E6=92=AD=E6=94=BE720p?= =?utf8?q?=E6=97=B6=EF=BC=8C=E5=B1=8F=E5=B9=95=E8=8A=B1=E5=B1=8F=E7=9A=84?= =?utf8?q?=E9=97=AE=E9=A2=98?= MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit --- arch/arm/mach-rk2818/clock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-rk2818/clock.c b/arch/arm/mach-rk2818/clock.c index 59233f1e81f3..427846987b74 100644 --- a/arch/arm/mach-rk2818/clock.c +++ b/arch/arm/mach-rk2818/clock.c @@ -410,7 +410,7 @@ static const struct rockchip_pll_set arm_pll[] = { // clk_hz = 24*clkf/(clkr*clkod) clkr clkf clkod hdiv pdiv flags (pdiv=1,2,4,no 3!!) ARM_PLL(576 * SCU_CLK_MHZ, 4, 96, 1, 12, 31, 41, 1), ARM_PLL(384 * SCU_CLK_MHZ, 3, 96, 2, 8, 21, 41, 1), - ARM_PLL(192 * SCU_CLK_MHZ, 4, 96, 3, 4, 21, 21, 1), + ARM_PLL(192 * SCU_CLK_MHZ, 4, 96, 3, 4, 11, 41, 1), // last item, pll power down. set real clk == SCU_ARM_MID_CLK ARM_PLL( 24 * SCU_CLK_MHZ, 4, 48, 1, 6, 31, 21, 0), // POWER down }; -- 2.34.1