From 025cc6e1be4cc3d780f10bb9ec92eba831a45f79 Mon Sep 17 00:00:00 2001 From: Dale Johannesen Date: Mon, 20 Dec 2010 20:10:50 +0000 Subject: [PATCH] Cosmetic changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122259 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 ++-- test/CodeGen/X86/x86_64-mul-by-const.ll | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index c54da0dd398..c1288d5d7be 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3172,15 +3172,15 @@ SDValue DAGCombiner::visitSRL(SDNode *N) { } // fold (srl (trunc (srl x, c1)), c2) -> 0 or (trunc (srl x, (add c1, c2))) - // This is only valid if the OpSizeInBits + c1 = size of inner shift if (N1C && N0.getOpcode() == ISD::TRUNCATE && N0.getOperand(0).getOpcode() == ISD::SRL && - N0.getOperand(0)->getOperand(1).getOpcode() == ISD::Constant) { + isa(N0.getOperand(0)->getOperand(1))) { uint64_t c1 = cast(N0.getOperand(0)->getOperand(1))->getZExtValue(); uint64_t c2 = N1C->getZExtValue(); EVT InnerShiftVT = N0.getOperand(0)->getOperand(1).getValueType(); uint64_t InnerShiftSize = InnerShiftVT.getScalarType().getSizeInBits(); + // This is only valid if the OpSizeInBits + c1 = size of inner shift. if (c1 + OpSizeInBits == InnerShiftSize) { if (c1 + c2 >= InnerShiftSize) return DAG.getConstant(0, VT); diff --git a/test/CodeGen/X86/x86_64-mul-by-const.ll b/test/CodeGen/X86/x86_64-mul-by-const.ll index 9cda9ab192a..df48a29156c 100644 --- a/test/CodeGen/X86/x86_64-mul-by-const.ll +++ b/test/CodeGen/X86/x86_64-mul-by-const.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -; Formerly there were two shifts. 8771012. +; Formerly there were two shifts. rdar://8771012. define i32 @f9188_mul365384439_shift27(i32 %A) nounwind { ; CHECK: imulq $365384439, -- 2.34.1