From 0104dd3ffd75b9620610b63eaa72f573f5a20752 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Wed, 7 Mar 2012 00:52:41 +0000 Subject: [PATCH] ARM pre-v6 alias for 'nop' to 'mov r0, r0' git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152185 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrInfo.td | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 0b1406e657a..e2160244f4f 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -5252,6 +5252,10 @@ def : ARMInstAlias<"mul${s}${p} $Rn, $Rm", def : ARMInstAlias<"neg${s}${p} $Rd, $Rm", (RSBri GPR:$Rd, GPR:$Rm, 0, pred:$p, cc_out:$s)>; +// Pre-v6, 'mov r0, r0' was used as a NOP encoding. +def : InstAlias<"nop${p}", (MOVr R0, R0, pred:$p, zero_reg)>, + Requires<[IsARM, NoV6]>; + // 'it' blocks in ARM mode just validate the predicates. The IT itself // is discarded. def ITasm : ARMAsmPseudo<"it$mask $cc", (ins it_pred:$cc, it_mask:$mask)>; -- 2.34.1